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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
commitc96f03a2507dd8445ee3abe2f81df919c4cc5e58 (patch)
tree60d6693be570b61d2dfe2413be46a5a1254c19ed /src/arch/arm/isa
parent0aff168f1a3852150dc9520c294a60e8e5f917b9 (diff)
downloadgem5-c96f03a2507dd8445ee3abe2f81df919c4cc5e58.tar.xz
ARM: Implement base classes for the saturation instructions.
Diffstat (limited to 'src/arch/arm/isa')
-rw-r--r--src/arch/arm/isa/templates/misc.isa51
1 files changed, 51 insertions, 0 deletions
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index 566d0a8dd..82e9aeab7 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -119,3 +119,54 @@ def template RevOpConstructor {{
%(constructor)s;
}
}};
+
+def template SatOpDeclare {{
+class %(class_name)s : public %(base_class)s
+{
+ protected:
+ public:
+ // Constructor
+ %(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1);
+ %(BasicExecDeclare)s
+};
+}};
+
+def template SatOpConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest,
+ uint32_t _satImm,
+ IntRegIndex _op1)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+ _dest, _satImm, _op1)
+ {
+ %(constructor)s;
+ }
+}};
+
+def template SatShiftOpDeclare {{
+class %(class_name)s : public %(base_class)s
+{
+ protected:
+ public:
+ // Constructor
+ %(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1,
+ int32_t _shiftAmt, ArmShiftType _shiftType);
+ %(BasicExecDeclare)s
+};
+}};
+
+def template SatShiftOpConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest,
+ uint32_t _satImm,
+ IntRegIndex _op1,
+ int32_t _shiftAmt,
+ ArmShiftType _shiftType)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+ _dest, _satImm, _op1, _shiftAmt, _shiftType)
+ {
+ %(constructor)s;
+ }
+}};