diff options
| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-05-29 16:30:33 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-14 13:45:49 +0000 |
| commit | fe8faa62b74087febe227f69385db3e562682799 (patch) | |
| tree | 2ae38f63d387a49c048f3dc9f71f07eb70bce1ce /src/arch/arm/isa | |
| parent | 831184d2949fbd790a2040738079ca03c8cfdefe (diff) | |
| download | gem5-fe8faa62b74087febe227f69385db3e562682799.tar.xz | |
arch-arm: Add Illegal Execution flag to PCState
This patch moves the detection of the Illegal Execution flag (PSTATE.IL)
from the tlb translation stage (fetch) to the decoding stage. This is
done by adding the illegalExecution field to the PCState.
Change-Id: I9c1c4e9c6bd5ded905c1d56b3034e4e9322582fa
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10813
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa')
| -rw-r--r-- | src/arch/arm/isa/bitfields.isa | 3 | ||||
| -rw-r--r-- | src/arch/arm/isa/decoder/decoder.isa | 20 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/pseudo.isa | 11 |
3 files changed, 23 insertions, 11 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa index ba9a39efb..ac6989a33 100644 --- a/src/arch/arm/isa/bitfields.isa +++ b/src/arch/arm/isa/bitfields.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010, 2011 ARM Limited +// Copyright (c) 2010, 2011, 2018 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -47,6 +47,7 @@ // Opcode fields def bitfield DECODERFAULT decoderFault; +def bitfield ILLEGALEXEC illegalExecution; def bitfield ENCODING encoding; def bitfield OPCODE opcode; diff --git a/src/arch/arm/isa/decoder/decoder.isa b/src/arch/arm/isa/decoder/decoder.isa index c352e0870..1c9acbebc 100644 --- a/src/arch/arm/isa/decoder/decoder.isa +++ b/src/arch/arm/isa/decoder/decoder.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2011 ARM Limited +// Copyright (c) 2010-2011,2018 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -40,15 +40,17 @@ // // Authors: Gabe Black -decode DECODERFAULT default DecoderFault::decoderFault() { - 0: decode THUMB default Unknown::unknown() { - 0: decode AARCH64 { - 0: - ##include "arm.isa" +decode ILLEGALEXEC default IllegalExec::illegalExec() { + 0: decode DECODERFAULT default DecoderFault::decoderFault() { + 0: decode THUMB default Unknown::unknown() { + 0: decode AARCH64 { + 0: + ##include "arm.isa" + 1: + ##include "aarch64.isa" + } 1: - ##include "aarch64.isa" + ##include "thumb.isa" } - 1: - ##include "thumb.isa" } } diff --git a/src/arch/arm/isa/formats/pseudo.isa b/src/arch/arm/isa/formats/pseudo.isa index 30c2320e1..407b1c8d3 100644 --- a/src/arch/arm/isa/formats/pseudo.isa +++ b/src/arch/arm/isa/formats/pseudo.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2014 ARM Limited +// Copyright (c) 2014, 2018 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -55,6 +55,15 @@ def format DecoderFault() {{ //////////////////////////////////////////////////////////////////// // +// Illegal execution handling +// + +def format IllegalExec() {{ + decode_block = 'return new IllegalExecInst(machInst);\n' +}}; + +//////////////////////////////////////////////////////////////////// +// // Unknown instruction handling // |