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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
| commit | 566b2ff20c311375a1d25cde735ddfb70706b581 (patch) | |
| tree | 4657d5202cab9ad9e5dadf4b8d8cf7b67cfae415 /src/arch/arm/isa | |
| parent | b9cfe9a3dba31afa5aca75e76b91441473a764d6 (diff) | |
| download | gem5-566b2ff20c311375a1d25cde735ddfb70706b581.tar.xz | |
ARM: Decode the nop instruction.
Diffstat (limited to 'src/arch/arm/isa')
| -rw-r--r-- | src/arch/arm/isa/formats/branch.isa | 2 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/data.isa | 2 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/uncond.isa | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa index 865a73b32..999126081 100644 --- a/src/arch/arm/isa/formats/branch.isa +++ b/src/arch/arm/isa/formats/branch.isa @@ -157,7 +157,7 @@ def format Thumb32BranchesAndMiscCtrl() {{ } else { switch (op2) { case 0x0: - return new WarnUnimplemented("nop", machInst); + return new NopInst(machInst); case 0x1: return new WarnUnimplemented("yield", machInst); case 0x2: diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa index 7679aa355..51cb4fd03 100644 --- a/src/arch/arm/isa/formats/data.isa +++ b/src/arch/arm/isa/formats/data.isa @@ -1043,7 +1043,7 @@ def format Thumb16Misc() {{ return new WarnUnimplemented("it", machInst); switch (bits(machInst, 7, 4)) { case 0x0: - return new WarnUnimplemented("nop", machInst); + return new NopInst(machInst); case 0x1: return new WarnUnimplemented("yield", machInst); case 0x2: diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa index 1b3c323aa..cd041f21b 100644 --- a/src/arch/arm/isa/formats/uncond.isa +++ b/src/arch/arm/isa/formats/uncond.isa @@ -58,7 +58,7 @@ def format ArmUnconditional() {{ machInst); } else if (bits(op1, 2, 0) == 1) { // Unallocated memory hint - return new WarnUnimplemented("nop", machInst); + return new NopInst(machInst); } else if (bits(op1, 2, 0) == 5) { const bool add = bits(machInst, 23); const uint32_t imm12 = bits(machInst, 11, 0); @@ -108,7 +108,7 @@ def format ArmUnconditional() {{ switch (op1 & 0xf7) { case 0x61: // Unallocated memory hint - return new WarnUnimplemented("nop", machInst); + return new NopInst(machInst); case 0x65: { const uint32_t imm5 = bits(machInst, 11, 7); |