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| author | Geoffrey Blake <geoffrey.blake@arm.com> | 2014-05-09 18:58:46 -0400 |
|---|---|---|
| committer | Geoffrey Blake <geoffrey.blake@arm.com> | 2014-05-09 18:58:46 -0400 |
| commit | 29601eada77e66d346def0b219f6ccff48586ace (patch) | |
| tree | b869c97cea70229f580e391597a1740dbd05600e /src/arch/arm/isa | |
| parent | a3306d0d5e4c83fcce7f7d5915a2a16a99d21744 (diff) | |
| download | gem5-29601eada77e66d346def0b219f6ccff48586ace.tar.xz | |
arm: Panics in miscreg read functions can be tripped by O3 model
Unimplemented miscregs for the generic timer were guarded by panics
in arm/isa.cc which can be tripped by the O3 model if it speculatively
executes a wrong path containing a mrs instruction with a bad miscreg
index. These registers were flagged as implemented and accessible.
This patch changes the miscreg info bit vector to flag them as
unimplemented and inaccessible. In this case, and UndefinedInst
fault will be generated if the register access is not trapped
by a hypervisor.
Diffstat (limited to 'src/arch/arm/isa')
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 678a125fb..76fc1fbed 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -851,7 +851,7 @@ let {{ // if we're in non secure PL1 mode then we can trap regargless of whether // the register is accessable, in other modes we trap if only if the register // IS accessable. - if (!canRead & !(hypTrap & !inUserMode(Cpsr) & !inSecureState(Scr, Cpsr))) { + if (!canRead && !(hypTrap && !inUserMode(Cpsr) && !inSecureState(Scr, Cpsr))) { return new UndefinedInstruction(machInst, false, mnemonic); } if (hypTrap) { @@ -906,7 +906,7 @@ let {{ // if we're in non secure PL1 mode then we can trap regargless of whether // the register is accessable, in other modes we trap if only if the register // IS accessable. - if (!canRead & !(hypTrap & !inUserMode(Cpsr) & !inSecureState(Scr, Cpsr))) { + if (!canRead && !(hypTrap && !inUserMode(Cpsr) && !inSecureState(Scr, Cpsr))) { return new UndefinedInstruction(machInst, false, mnemonic); } if (hypTrap) { |