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authorAli Saidi <Ali.Saidi@ARM.com>2011-08-19 15:08:07 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-08-19 15:08:07 -0500
commitb94f84196924d60d4d4677929ddb6f677e3d96d9 (patch)
treeb084d2cf4bf59bd34ce2eb4eadcae7c2fd25d118 /src/arch/arm/isa
parentb6203360ef684a8dc32981221336f5d216ce2668 (diff)
downloadgem5-b94f84196924d60d4d4677929ddb6f677e3d96d9.tar.xz
ARM: Add support for DIV/SDIV instructions.
Diffstat (limited to 'src/arch/arm/isa')
-rw-r--r--src/arch/arm/isa/formats/mult.isa10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/mult.isa b/src/arch/arm/isa/formats/mult.isa
index cfd00b1a5..73157dd57 100644
--- a/src/arch/arm/isa/formats/mult.isa
+++ b/src/arch/arm/isa/formats/mult.isa
@@ -394,6 +394,16 @@ def format ArmSignedMultiplies() {{
}
}
break;
+ case 0x1:
+ if (op2 == 0 && m == 0 && ra == 0xf) {
+ return new Sdiv(machInst, rd, rn, rm);
+ }
+ break;
+ case 0x3:
+ if (op2 == 0 && m == 0 && ra == 0xf) {
+ return new Udiv(machInst, rd, rn, rm);
+ }
+ break;
case 0x4:
if (op2 == 0) {
if (m) {