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authorAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:21 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:21 -0400
commite1ac9629398027186ef4c2a66772aeff2b4c6792 (patch)
tree69a2591a576690aeafca28eef2374b20b76d7c3c /src/arch/arm/isa_traits.hh
parent23c85407562c3e2e2f3e1ca8b8dcbdc38fac82df (diff)
downloadgem5-e1ac9629398027186ef4c2a66772aeff2b4c6792.tar.xz
arch: Cleanup unused ISA traits constants
This patch prunes unused values, and also unifies how the values are defined (not using an enum for ALPHA), aligning the use of int vs Addr etc. The patch also removes the duplication of PageBytes/PageShift and VMPageSize/LogVMPageSize. For all ISAs the two pairs had identical values and the latter has been removed.
Diffstat (limited to 'src/arch/arm/isa_traits.hh')
-rw-r--r--src/arch/arm/isa_traits.hh11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 506c5009c..8be2bf04a 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -51,8 +51,6 @@
namespace LittleEndianGuest {}
-#define TARGET_ARM
-
namespace ArmISA
{
using namespace LittleEndianGuest;
@@ -101,16 +99,7 @@ namespace ArmISA
// return a no-op instruction... used for instruction fetch faults
const ExtMachInst NoopMachInst = 0x01E320F000ULL;
- const int LogVMPageSize = 12; // 4K bytes
- const int VMPageSize = (1 << LogVMPageSize);
-
- // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
- const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
-
const int MachineBytes = 4;
- const int WordBytes = 4;
- const int HalfwordBytes = 2;
- const int ByteBytes = 1;
const uint32_t HighVecs = 0xFFFF0000;