arm, kvm: remove KvmGic

KvmGic functionality has been subsumed within the new MuxingKvmGic
model, which has Pl390 fallback when not using KVM for fast emulation.
This simplifies configuration and will enable checkpointing between
KVM emulation and full-system simulation.

Change-Id: Ie61251720064c512843015c075e4ac419a4081e8
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 0 insertions, 69 deletions

diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh
index fc09da6a0..7e2e772b8 100644
--- a/src/arch/arm/kvm/gic.hh
+++ b/src/arch/arm/kvm/gic.hh
@@ -44,7 +44,6 @@
 #include "arch/arm/system.hh"
 #include "cpu/kvm/device.hh"
 #include "cpu/kvm/vm.hh"
-#include "dev/arm/base_gic.hh"
 #include "dev/arm/gic_pl390.hh"
 #include "dev/platform.hh"
 
@@ -138,74 +137,6 @@ class KvmKernelGicV2
     KvmDevice kdev;
 };
 
-struct KvmGicParams;
-
-/**
- * In-kernel GIC model.
- *
- * When using a KVM-based CPU model, it is possible to offload GIC
- * emulation to the kernel. This reduces some overheads when the guest
- * accesses the GIC and makes it possible to use in-kernel
- * architected/generic timer emulation.
- *
- * This device uses interfaces with the kernel GicV2 model that is
- * documented in Documentation/virtual/kvm/devices/arm-vgic.txt in the
- * Linux kernel sources.
- *
- * This GIC model has the following known limitations:
- * <ul>
- *   <li>Checkpointing is not supported.
- *   <li>This model only works with kvm. Simulated CPUs are not
- *       supported since this would require the kernel to inject
- *       interrupt into the simulated CPU.
- * </ul>
- *
- * @warn This GIC model cannot be used with simulated CPUs!
- */
-class KvmGic : public BaseGic
-{
-  public: // SimObject / Serializable / Drainable
-    KvmGic(const KvmGicParams *p);
-    ~KvmGic();
-
-    void startup() override { verifyMemoryMode(); }
-    void drainResume() override { verifyMemoryMode(); }
-
-    void serialize(CheckpointOut &cp) const override;
-    void unserialize(CheckpointIn &cp) override;
-
-  public: // PioDevice
-    AddrRangeList getAddrRanges() const { return addrRanges; }
-    Tick read(PacketPtr pkt) override;
-    Tick write(PacketPtr pkt) override;
-
-  public: // BaseGic
-    void sendInt(uint32_t num) override;
-    void clearInt(uint32_t num) override;
-
-    void sendPPInt(uint32_t num, uint32_t cpu) override;
-    void clearPPInt(uint32_t num, uint32_t cpu) override;
-
-  protected:
-    /**
-     * Do memory mode sanity checks
-     *
-     * This method only really exists to warn users that try to switch
-     * to a simulate CPU. There is no fool proof method to detect
-     * simulated CPUs, but checking that we're in atomic mode and
-     * bypassing caches should be robust enough.
-     */
-    void verifyMemoryMode() const;
-
-    /** System this interrupt controller belongs to */
-    System &system;
-
-    /** Kernel GIC device */
-    KvmKernelGicV2 kernelGic;
-
-    /** Union of all memory  */
-    const AddrRangeList addrRanges;
-};
 
 struct MuxingKvmGicParams;