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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:09 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:09 -0500 |
| commit | 8a7f60194ea24f63759d1985cc04c1fa8b8e2dcb (patch) | |
| tree | 20f0678c236e821cbbf819ae51f75a7697cbdb87 /src/arch/arm/miscregs.hh | |
| parent | 89133b15dae1f13cbc937077ce5b5856ed130b5f (diff) | |
| download | gem5-8a7f60194ea24f63759d1985cc04c1fa8b8e2dcb.tar.xz | |
ARM: Ignore/warn on accesses to the dccmvac register.
Diffstat (limited to 'src/arch/arm/miscregs.hh')
| -rw-r--r-- | src/arch/arm/miscregs.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index ae2cc2247..df3d00946 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -84,6 +84,7 @@ namespace ArmISA MISCREG_SCTLR = MISCREG_CP15_START, MISCREG_DCCISW, MISCREG_DCCIMVAC, + MISCREG_DCCMVAC, MISCREG_CONTEXTIDR, MISCREG_TPIDRURW, MISCREG_TPIDRURO, @@ -138,7 +139,6 @@ namespace ArmISA MISCREG_BPIMVA, MISCREG_DCIMVAC, MISCREG_DCISW, - MISCREG_DCCMVAC, MISCREG_MCCSW, MISCREG_DCCMVAU, @@ -158,7 +158,7 @@ namespace ArmISA "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_mon", "spsr_und", "spsr_abt", "fpsr", "fpsid", "fpscr", "fpexc", - "sctlr", "dccisw", "dccimvac", + "sctlr", "dccisw", "dccimvac", "dccmvac", "contextidr", "tpidrurw", "tpidruro", "tpidrprw", "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", "icialluis", "iciallu", "icimvau", @@ -170,7 +170,7 @@ namespace ArmISA "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", "rgnr", "bpiallis", - "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw", + "bpiall", "bpimva", "dcimvac", "dcisw", "mccsw", "dccmvau", "nop", "raz" }; |