arm: Mark some miscregs (timer counter) registers at unverifiable.

The checker can't verify timer registers, so it should just grab the version
from the executing CPU, otherwise it could get a larger value and diverge
execution.

1 files changed, 2 insertions, 0 deletions

diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 3852caee8..930902543 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -677,6 +677,8 @@ namespace ArmISA
 
     enum MiscRegInfo {
         MISCREG_IMPLEMENTED,
+        MISCREG_UNVERIFIABLE,   // Does the value change on every read (e.g. a
+                                // arch generic counter)
         MISCREG_WARN_NOT_FAIL,  // If MISCREG_IMPLEMENTED is deasserted, it
                                 // tells whether the instruction should raise a
                                 // warning or fail