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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:29 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:29 -0500 |
| commit | 8af1eeec6f28d9722802bf1588c911711db07ddd (patch) | |
| tree | 79f0ba732e6aa8935e78a6e8e8f15896784f370e /src/arch/arm/miscregs.hh | |
| parent | 6b6989049383b67a2daef562a0319421ff1a8067 (diff) | |
| download | gem5-8af1eeec6f28d9722802bf1588c911711db07ddd.tar.xz | |
ARM: Use CPU local lock before sending load to mem system.
This change uses the locked_mem.hh header to handle implementing CLREX. It
simplifies the current implementation greatly.
Diffstat (limited to 'src/arch/arm/miscregs.hh')
| -rw-r--r-- | src/arch/arm/miscregs.hh | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index 2ccd9b4c2..051cd490e 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -171,6 +171,8 @@ namespace ArmISA MISCREG_ID_ISAR4, MISCREG_ID_ISAR5, MISCREG_CPSR_MODE, + MISCREG_LOCKFLAG, + MISCREG_LOCKADDR, MISCREG_CP15_UNIMP_START, MISCREG_TCMTR = MISCREG_CP15_UNIMP_START, MISCREG_ID_PFR1, @@ -234,7 +236,7 @@ namespace ArmISA "pmceid1", "pmc_other", "pmxevcntr", "pmuserenr", "pmintenset", "pmintenclr", "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5", - "cpsr_mode", + "cpsr_mode", "lockflag", "lockaddr", // Unimplemented below "tcmtr", "id_pfr1", "id_dfr0", "id_afr0", |