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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:13 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:13 -0500
commit951b7edaba6d1ad035a2f407fc1e04e828412b6c (patch)
tree96f6f1888e3c94408203a81394804bb90e5e7f12 /src/arch/arm/miscregs.hh
parentb5cfa9361b26eda818cd5810d5f4e8ae3fce5d0d (diff)
downloadgem5-951b7edaba6d1ad035a2f407fc1e04e828412b6c.tar.xz
ARM: Handle accesses to TTBR0 and TTBR1.
Diffstat (limited to 'src/arch/arm/miscregs.hh')
-rw-r--r--src/arch/arm/miscregs.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 52329a3dc..f43b55271 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -106,6 +106,8 @@ namespace ArmISA
MISCREG_BPIALLIS,
MISCREG_BPIALL,
MISCREG_MIDR,
+ MISCREG_TTBR0,
+ MISCREG_TTBR1,
MISCREG_CP15_UNIMP_START,
MISCREG_CTR = MISCREG_CP15_UNIMP_START,
MISCREG_TLBTR,
@@ -142,8 +144,6 @@ namespace ArmISA
MISCREG_SCR,
MISCREG_SDER,
MISCREG_NSACR,
- MISCREG_TTBR0,
- MISCREG_TTBR1,
MISCREG_TTBCR,
MISCREG_V2PCWPR,
MISCREG_V2PCWPW,
@@ -198,7 +198,7 @@ namespace ArmISA
"clidr", "ccsidr", "csselr",
"icialluis", "iciallu", "icimvau",
"bpimva", "bpiallis", "bpiall",
- "midr", "ctr", "tlbtr", "tcmtr", "mpidr",
+ "midr", "ttbr0", "ttbr1", "ctr", "tlbtr", "tcmtr", "mpidr",
"id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
"id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
"id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
@@ -206,7 +206,7 @@ namespace ArmISA
"dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
"dcimvac", "dcisw", "mccsw",
"dccmvau",
- "scr", "sder", "nsacr", "ttbr0", "ttbr1", "ttbcr",
+ "scr", "sder", "nsacr", "ttbcr",
"v2pcwpr", "v2pcwpw", "v2pcwur", "v2pcwuw",
"v2powpr", "v2powpw", "v2powur", "v2powuw",
"tlbiallis", "tlbimvais", "tlbiasidis", "tlbimvaais",