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| author | Dam Sunwoo <dam.sunwoo@arm.com> | 2010-06-02 12:58:18 -0500 |
|---|---|---|
| committer | Dam Sunwoo <dam.sunwoo@arm.com> | 2010-06-02 12:58:18 -0500 |
| commit | 6c8dd32fa4f21771a2c83886b08c3d68be516044 (patch) | |
| tree | 35a88b63e76ee57ffe73a1a2b118d2b2e676800c /src/arch/arm/pagetable.hh | |
| parent | 85ba2a32436aa7dde2319f213b5f410a80c6453a (diff) | |
| download | gem5-6c8dd32fa4f21771a2c83886b08c3d68be516044.tar.xz | |
ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PCWUR, V2PCWUW,...)
Diffstat (limited to 'src/arch/arm/pagetable.hh')
| -rw-r--r-- | src/arch/arm/pagetable.hh | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/arm/pagetable.hh b/src/arch/arm/pagetable.hh index f1e86f0cc..76b0e3bb8 100644 --- a/src/arch/arm/pagetable.hh +++ b/src/arch/arm/pagetable.hh @@ -133,6 +133,14 @@ struct TlbEntry bool nonCacheable; // Can we wrap this in mtype? bool sNp; // Section descriptor + // Memory Attributes + MemoryType mtype; + uint8_t innerAttrs; + uint8_t outerAttrs; + bool shareable; + uint32_t attributes; // Memory attributes formatted for PAR + + // Access permissions bool xn; // Execute Never uint8_t ap:3; // Access permissions bits |