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authorGabe Black <gabeblack@google.com>2018-10-13 01:25:30 -0700
committerGabe Black <gabeblack@google.com>2019-01-22 21:12:16 +0000
commit774770a6410abb129e2a19de1ca50d7c0c311fef (patch)
tree579e460775987782f64103e784527b2ae342eb14 /src/arch/arm/pmu.cc
parent2b80f588ab44c571c0355cd1b343fdd82f6f7b96 (diff)
downloadgem5-774770a6410abb129e2a19de1ca50d7c0c311fef.tar.xz
arm: Get rid of some register type definitions.
These are IntReg, FloatReg, FloatRegBits, and MiscReg. These have been supplanted by the global types RegVal and FloatRegVal. Change-Id: Ief1cd85d0eff7156282ddb1ce168a2a5677f7435 Reviewed-on: https://gem5-review.googlesource.com/c/13625 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Diffstat (limited to 'src/arch/arm/pmu.cc')
-rw-r--r--src/arch/arm/pmu.cc12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index 90d9f1a08..f6cf87294 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -54,7 +54,7 @@
namespace ArmISA {
-const MiscReg PMU::reg_pmcr_wr_mask = 0x39;
+const RegVal PMU::reg_pmcr_wr_mask = 0x39;
PMU::PMU(const ArmPMUParams *p)
: SimObject(p), BaseISADevice(),
@@ -189,7 +189,7 @@ PMU::regProbeListeners()
}
void
-PMU::setMiscReg(int misc_reg, MiscReg val)
+PMU::setMiscReg(int misc_reg, RegVal val)
{
DPRINTF(PMUVerbose, "setMiscReg(%s, 0x%x)\n",
miscRegName[unflattenMiscReg(misc_reg)], val);
@@ -297,16 +297,16 @@ PMU::setMiscReg(int misc_reg, MiscReg val)
miscRegName[misc_reg]);
}
-MiscReg
+RegVal
PMU::readMiscReg(int misc_reg)
{
- MiscReg val(readMiscRegInt(misc_reg));
+ RegVal val(readMiscRegInt(misc_reg));
DPRINTF(PMUVerbose, "readMiscReg(%s): 0x%x\n",
miscRegName[unflattenMiscReg(misc_reg)], val);
return val;
}
-MiscReg
+RegVal
PMU::readMiscRegInt(int misc_reg)
{
misc_reg = unflattenMiscReg(misc_reg);
@@ -645,7 +645,7 @@ PMU::setCounterTypeRegister(CounterId id, PMEVTYPER_t val)
}
void
-PMU::setOverflowStatus(MiscReg new_val)
+PMU::setOverflowStatus(RegVal new_val)
{
const bool int_old = reg_pmovsr != 0;
const bool int_new = new_val != 0;