diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-12 04:07:59 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-12 04:07:59 -0400 |
commit | 22c04190c607b9360d9a23548f8a54e83cf0e74a (patch) | |
tree | 576135962e3c9c725157b461c8009b05933bba2b /src/arch/arm/pmu.hh | |
parent | 735c4a87665119a33443cf8d191d329c66191c6e (diff) | |
download | gem5-22c04190c607b9360d9a23548f8a54e83cf0e74a.tar.xz |
misc: Remove redundant compiler-specific defines
This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.
Diffstat (limited to 'src/arch/arm/pmu.hh')
-rw-r--r-- | src/arch/arm/pmu.hh | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh index 80be965a4..fc5bf74b3 100644 --- a/src/arch/arm/pmu.hh +++ b/src/arch/arm/pmu.hh @@ -96,10 +96,10 @@ class PMU : public SimObject, public ArmISA::BaseISADevice { void addEventProbe(unsigned int id, SimObject *obj, const char *name); public: // SimObject and related interfaces - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; - void drainResume() M5_ATTR_OVERRIDE; + void drainResume() override; public: // ISA Device interface @@ -109,14 +109,14 @@ class PMU : public SimObject, public ArmISA::BaseISADevice { * @param misc_reg Register number (see miscregs.hh) * @param val Value to store */ - void setMiscReg(int misc_reg, MiscReg val) M5_ATTR_OVERRIDE; + void setMiscReg(int misc_reg, MiscReg val) override; /** * Read a register within the PMU. * * @param misc_reg Register number (see miscregs.hh) * @return Register value. */ - MiscReg readMiscReg(int misc_reg) M5_ATTR_OVERRIDE; + MiscReg readMiscReg(int misc_reg) override; protected: // PMU register types and constants BitUnion32(PMCR_t) @@ -269,7 +269,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice { : ProbeListenerArgBase(pm, name), pmu(_pmu), id(_id) {} - void notify(const uint64_t &val) M5_ATTR_OVERRIDE + void notify(const uint64_t &val) override { pmu.handleEvent(id, val); } @@ -329,8 +329,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice { listeners.reserve(4); } - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** * Add an event count to the counter and check for overflow. |