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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-10-01 16:02:45 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-10-01 16:02:45 -0500 |
| commit | b331b02669f95adf4744b1e7db50ad4b231fb704 (patch) | |
| tree | 682fc56d99d2efd7fd45651ad6d1ee35560d19f1 /src/arch/arm/predecoder.cc | |
| parent | aef4a9904e0324b2aba2ddc212768d5b0c72b566 (diff) | |
| download | gem5-b331b02669f95adf4744b1e7db50ad4b231fb704.tar.xz | |
ARM: Clean up use of TBit and JBit.
Rather tha constantly using ULL(1) << PcXBitShift define those directly.
Additionally, add some helper functions to further clean up the code.
Diffstat (limited to 'src/arch/arm/predecoder.cc')
| -rw-r--r-- | src/arch/arm/predecoder.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/predecoder.cc b/src/arch/arm/predecoder.cc index 20c7058b0..04cec59b9 100644 --- a/src/arch/arm/predecoder.cc +++ b/src/arch/arm/predecoder.cc @@ -43,6 +43,7 @@ #include "arch/arm/isa_traits.hh" #include "arch/arm/predecoder.hh" +#include "arch/arm/utility.hh" #include "base/trace.hh" #include "cpu/thread_context.hh" @@ -151,7 +152,7 @@ Predecoder::moreBytes(Addr pc, Addr fetchPC, MachInst inst) { data = inst; offset = (fetchPC >= pc) ? 0 : pc - fetchPC; - emi.thumb = (pc & (ULL(1) << PcTBitShift)) ? 1 : 0; + emi.thumb = isThumb(pc); FPSCR fpscr = tc->readMiscReg(MISCREG_FPSCR); emi.fpscrLen = fpscr.len; emi.fpscrStride = fpscr.stride; |