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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:19 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:19 -0500 |
| commit | 799c3da8d0086bfdfbae532e05018828387e4497 (patch) | |
| tree | a2922f9bcac507ff8e4031a060c825de1ad707d2 /src/arch/arm/predecoder.hh | |
| parent | 30143baf7e35a73acaff1d02cf71278248a86515 (diff) | |
| download | gem5-799c3da8d0086bfdfbae532e05018828387e4497.tar.xz | |
O3: Send instruction back to fetch on squash to seed predecoder correctly.
Diffstat (limited to 'src/arch/arm/predecoder.hh')
| -rw-r--r-- | src/arch/arm/predecoder.hh | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/predecoder.hh b/src/arch/arm/predecoder.hh index a99e38ce7..511bc29bc 100644 --- a/src/arch/arm/predecoder.hh +++ b/src/arch/arm/predecoder.hh @@ -83,6 +83,12 @@ namespace ArmISA predAddrValid = false; } + void reset(const ExtMachInst &old_emi) + { + reset(); + itstate = old_emi.newItstate; + } + Predecoder(ThreadContext * _tc) : tc(_tc), data(0) { |