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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:02 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:02 -0600 |
| commit | 0f9a3671b6d12f887501bc80ca50bb23c383686d (patch) | |
| tree | 5406b672b12e85c0654362272350cb50057be595 /src/arch/arm/registers.hh | |
| parent | 96375409ea7a5593ddd7f4f723db349921f35142 (diff) | |
| download | gem5-0f9a3671b6d12f887501bc80ca50bb23c383686d.tar.xz | |
ARM: Add support for moving predicated false dest operands from sources.
Diffstat (limited to 'src/arch/arm/registers.hh')
| -rw-r--r-- | src/arch/arm/registers.hh | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/arm/registers.hh b/src/arch/arm/registers.hh index 61e467e24..30289ff27 100644 --- a/src/arch/arm/registers.hh +++ b/src/arch/arm/registers.hh @@ -49,7 +49,11 @@ namespace ArmISA { -using ArmISAInst::MaxInstSrcRegs; + +// For a predicated instruction, we need all the +// destination registers to also be sources +const int MaxInstSrcRegs = ArmISAInst::MaxInstDestRegs + + ArmISAInst::MaxInstSrcRegs; using ArmISAInst::MaxInstDestRegs; typedef uint16_t RegIndex; |