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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-08-23 11:18:40 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-08-23 11:18:40 -0500 |
| commit | 5148c693d84062af857b5b8663e44434dba2b894 (patch) | |
| tree | f6f48cc12011291e18cb5d6d0d087152d1f12357 /src/arch/arm/registers.hh | |
| parent | fc1730044eca89c4df7169546be69fed3b415f57 (diff) | |
| download | gem5-5148c693d84062af857b5b8663e44434dba2b894.tar.xz | |
ARM: Add some registers for big loads/stores to support neon.
Diffstat (limited to 'src/arch/arm/registers.hh')
| -rw-r--r-- | src/arch/arm/registers.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/registers.hh b/src/arch/arm/registers.hh index 670b4b841..480178860 100644 --- a/src/arch/arm/registers.hh +++ b/src/arch/arm/registers.hh @@ -55,7 +55,7 @@ typedef uint64_t MiscReg; const int NumIntArchRegs = NUM_ARCH_INTREGS; // The number of single precision floating point registers const int NumFloatArchRegs = 64; -const int NumFloatSpecialRegs = 5; +const int NumFloatSpecialRegs = 8; const int NumIntRegs = NUM_INTREGS; const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs; |