arch-arm: fix GDB stub after SVE

The SVE patches made registers longer by increasing NumVecElemPerVecReg,
but the GDB XML was not updated to account for that, and as a result GDB
connections were failing with:

Remote 'g' packet reply is too long

This commit introduces NumVecElemPerSimdVecReg which counts only the SIMD
register sizes to get it back working. SVE GDB support is not added here.

Change-Id: I4191b9f1999ae02b0308863db4cc9b5b16a27d6d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20468
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc
index 05adfeaed..ceb0ffafe 100644
--- a/src/arch/arm/remote_gdb.cc
+++ b/src/arch/arm/remote_gdb.cc
@@ -1,7 +1,7 @@
 /*
  * Copyright 2015 LabWare
  * Copyright 2014 Google Inc.
- * Copyright (c) 2010, 2013, 2016, 2018 ARM Limited
+ * Copyright (c) 2010, 2013, 2016, 2018-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -212,7 +212,7 @@ RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context)
     size_t base = 0;
     for (int i = 0; i < NumVecV8ArchRegs; i++) {
         auto v = (context->readVecReg(RegId(VecRegClass, i))).as<VecElem>();
-        for (size_t j = 0; j < NumVecElemPerVecReg; j++) {
+        for (size_t j = 0; j < NumVecElemPerNeonVecReg; j++) {
             r.v[base] = v[j];
             base++;
         }
@@ -241,7 +241,7 @@ RemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const
     for (int i = 0; i < NumVecV8ArchRegs; i++) {
         auto v = (context->getWritableVecReg(
                 RegId(VecRegClass, i))).as<VecElem>();
-        for (size_t j = 0; j < NumVecElemPerVecReg; j++) {
+        for (size_t j = 0; j < NumVecElemPerNeonVecReg; j++) {
             v[j] = r.v[base];
             base++;
         }