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authorChander Sudanthi <chander.sudanthi@arm.com>2012-06-05 01:23:10 -0400
committerChander Sudanthi <chander.sudanthi@arm.com>2012-06-05 01:23:10 -0400
commit8a2ca2fd241a1019122578a875c917329710c930 (patch)
tree2c4f71668dc949bd0e2fb52dc023922bde43a3ac /src/arch/arm/system.cc
parente60b2ac7060eff8dd6d68c7f92ef220511e7daa2 (diff)
downloadgem5-8a2ca2fd241a1019122578a875c917329710c930.tar.xz
ARM: Fix MPIDR and MIDR register implementation.
This change allows designating a system as MP capable or not as some bootloaders/kernels care that it's set right. You can have a single processor MP capable system, but you can't have a multi-processor UP only system. This change also fixes the initialization of the MIDR register.
Diffstat (limited to 'src/arch/arm/system.cc')
-rw-r--r--src/arch/arm/system.cc8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index f6c4ad783..380676bbb 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -53,7 +53,7 @@ using namespace std;
using namespace Linux;
ArmSystem::ArmSystem(Params *p)
- : System(p), bootldr(NULL)
+ : System(p), bootldr(NULL), multiProc(p->multi_proc)
{
if (p->boot_loader != "") {
bootldr = createObjectFile(p->boot_loader);
@@ -107,10 +107,8 @@ ArmSystem::initState()
}
for (int i = 0; i < threadContexts.size(); i++) {
- if (p->midr_regval) {
- threadContexts[i]->setMiscReg(ArmISA::MISCREG_MIDR,
- p->midr_regval);
- }
+ threadContexts[i]->setMiscReg(ArmISA::MISCREG_MIDR,
+ p->midr_regval);
}
}