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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-05-23 13:46:52 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-05-23 13:46:52 +0100 |
commit | 65f3f097d3c270d2f28fc7d55651afaefb56ceed (patch) | |
tree | 099c9667e246b9e8197f292c1880d9f7a3af9159 /src/arch/arm/system.hh | |
parent | 5435f25ec80ff691c4e42e06888c60a01848a31d (diff) | |
download | gem5-65f3f097d3c270d2f28fc7d55651afaefb56ceed.tar.xz |
dev, arm: Refactor and clean up the generic timer model
This changeset cleans up the generic timer a bit and moves most of the
register juggling from the ISA code into a separate class in the same
source file as the rest of the generic timer. It also removes the
assumption that there is always 8 or fewer CPUs in the system. Instead
of having a fixed limit, we now instantiate per-core timers as they
are requested. This is all in preparation for other patches that add
support for virtual timers and a memory mapped interface.
Diffstat (limited to 'src/arch/arm/system.hh')
-rw-r--r-- | src/arch/arm/system.hh | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh index 0937f6376..3add01e61 100644 --- a/src/arch/arm/system.hh +++ b/src/arch/arm/system.hh @@ -46,13 +46,13 @@ #include <string> #include <vector> -#include "dev/arm/generic_timer.hh" #include "kern/linux/events.hh" #include "params/ArmSystem.hh" #include "params/GenericArmSystem.hh" #include "sim/sim_object.hh" #include "sim/system.hh" +class GenericTimer; class ThreadContext; class ArmSystem : public System @@ -166,11 +166,8 @@ class ArmSystem : public System _genericTimer = generic_timer; } - /** Returns a pointer to the system counter. */ - GenericTimer::SystemCounter *getSystemCounter() const; - - /** Returns a pointer to the appropriate architected timer. */ - GenericTimer::ArchTimer *getArchTimer(int cpu_id) const; + /** Get a pointer to the system's generic timer model */ + GenericTimer *getGenericTimer() const { return _genericTimer; } /** Returns true if the register width of the highest implemented exception * level is 64 bits (ARMv8) */ |