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| author | Gene Wu <Gene.Wu@arm.com> | 2010-08-23 11:18:41 -0500 |
|---|---|---|
| committer | Gene Wu <Gene.Wu@arm.com> | 2010-08-23 11:18:41 -0500 |
| commit | 23626d99af9469b5a86f510e0542846f5af65cbd (patch) | |
| tree | cac4ec64670fe842af14a0183ae7d53b44ba9478 /src/arch/arm/table_walker.cc | |
| parent | 1fd104fc35ed5a1fa01e5709aba0dec58a5db6f5 (diff) | |
| download | gem5-23626d99af9469b5a86f510e0542846f5af65cbd.tar.xz | |
ARM: Make sure that software prefetch instructions can't change the state of the TLB
Diffstat (limited to 'src/arch/arm/table_walker.cc')
| -rw-r--r-- | src/arch/arm/table_walker.cc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc index 6dcb387a3..1d363c66f 100644 --- a/src/arch/arm/table_walker.cc +++ b/src/arch/arm/table_walker.cc @@ -439,11 +439,10 @@ TableWalker::doL1Descriptor() * AccessFlag0 */ - currState->fault = - new DataAbort(currState->vaddr, NULL, currState->isWrite, + currState->fault = new DataAbort(currState->vaddr, + currState->l1Desc.domain(), currState->isWrite, ArmFault::AccessFlag0); } - if (currState->l1Desc.supersection()) { panic("Haven't implemented supersections\n"); } |