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author | Gabe Black <gabeblack@google.com> | 2019-04-22 19:45:10 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2019-04-28 01:19:40 +0000 |
commit | cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9 (patch) | |
tree | 893cea35432466600b55a2e4434ed61ba1e28f69 /src/arch/arm/table_walker.cc | |
parent | 3cfff8574a19536e2b3d057b43b59fcf35932c81 (diff) | |
download | gem5-cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9.tar.xz |
mem: Minimize the use of MemObject.
MemObject doesn't provide anything beyond its base ClockedObject any
more, so this change removes it from most inheritance hierarchies.
Occasionally MemObject is replaced with SimObject when I was fairly
confident that the extra functionality of ClockedObject wasn't needed.
Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/arm/table_walker.cc')
-rw-r--r-- | src/arch/arm/table_walker.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc index d310e9ee6..6f06b7112 100644 --- a/src/arch/arm/table_walker.cc +++ b/src/arch/arm/table_walker.cc @@ -57,7 +57,7 @@ using namespace ArmISA; TableWalker::TableWalker(const Params *p) - : MemObject(p), + : ClockedObject(p), stage2Mmu(NULL), port(NULL), masterId(Request::invldMasterId), isStage2(p->is_stage2), tlb(NULL), currState(NULL), pending(false), @@ -124,7 +124,7 @@ TableWalker::getPort(const std::string &if_name, PortID idx) fatal("Cannot access table walker port through stage-two walker\n"); } } - return MemObject::getPort(if_name, idx); + return ClockedObject::getPort(if_name, idx); } TableWalker::WalkerState::WalkerState() : |