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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:16 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:16 -0500 |
| commit | c1e1de8d69624b1cf18a13a46e624ad5827954b7 (patch) | |
| tree | 60f11a14eafcc03715c283270edb336e0a44bccc /src/arch/arm/table_walker.hh | |
| parent | 7de7ea3b22e16a6d489a71dc5c54ddba5a5b5a0e (diff) | |
| download | gem5-c1e1de8d69624b1cf18a13a46e624ad5827954b7.tar.xz | |
ARM: Some TLB bug fixes.
Diffstat (limited to 'src/arch/arm/table_walker.hh')
| -rw-r--r-- | src/arch/arm/table_walker.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh index d18b7c489..8e851acd7 100644 --- a/src/arch/arm/table_walker.hh +++ b/src/arch/arm/table_walker.hh @@ -100,7 +100,7 @@ class TableWalker : public MemObject /** Is the translation global (no asid used)? */ bool global() const { - return bits(data, 17); + return bits(data, 4); } /** Is the translation not allow execution? */ @@ -130,7 +130,7 @@ class TableWalker : public MemObject /** Memory region attributes: ARM DDI 0406B: B3-32 */ uint8_t texcb() const { - return bits(data, 2) | bits(data,3) << 1 | bits(data, 12, 14) << 2; + return bits(data, 2) | bits(data,3) << 1 | bits(data, 14, 12) << 2; } }; @@ -174,8 +174,8 @@ class TableWalker : public MemObject uint8_t texcb() const { return large() ? - (bits(data, 2) | (bits(data,3) << 1) | (bits(data, 12, 14) << 2)) : - (bits(data, 2) | (bits(data,3) << 1) | (bits(data, 6, 8) << 2)); + (bits(data, 2) | (bits(data,3) << 1) | (bits(data, 14, 12) << 2)) : + (bits(data, 2) | (bits(data,3) << 1) | (bits(data, 8, 6) << 2)); } /** Return the physical frame, bits shifted right */ |