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authorGene WU <gene.wu@arm.com>2010-08-25 19:10:43 -0500
committerGene WU <gene.wu@arm.com>2010-08-25 19:10:43 -0500
commitb52fed4747423680cde8ec407605be6bfd017822 (patch)
tree83098fe40ca2d9d538458303403099384c475700 /src/arch/arm/table_walker.hh
parentc23e8c31ebd4e856f205f5bdd8f4eb5e1eec87ee (diff)
downloadgem5-b52fed4747423680cde8ec407605be6bfd017822.tar.xz
ARM: Seperate the queues of L1 and L2 walker states.
Diffstat (limited to 'src/arch/arm/table_walker.hh')
-rw-r--r--src/arch/arm/table_walker.hh7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 2a93c4460..680c93cba 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -302,7 +302,12 @@ class TableWalker : public MemObject
};
- std::list<WalkerState *> stateQueue;
+ /** Queue of requests that need processing first level translation */
+ std::list<WalkerState *> stateQueueL1;
+
+ /** Queue of requests that have passed first level translation and
+ * require an additional level. */
+ std::list<WalkerState *> stateQueueL2;
/** Port to issue translation requests from */
DmaPort *port;