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authorGabe Black <gblack@eecs.umich.edu>2010-10-13 01:57:31 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-10-13 01:57:31 -0700
commit930c653270b1523cbeb32a4b48d1fd08eaac6eb8 (patch)
tree57a7c91f46975998626424123edada275e8649fb /src/arch/arm/tlb.cc
parentb273e0be33049fc36b386b5ba183f69de53268c2 (diff)
downloadgem5-930c653270b1523cbeb32a4b48d1fd08eaac6eb8.tar.xz
Mem: Change the CLREX flag to CLEAR_LL.
CLREX is the name of an ARM instruction, not a name for this generic flag.
Diffstat (limited to 'src/arch/arm/tlb.cc')
-rw-r--r--src/arch/arm/tlb.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 4e98aaf7b..c0ebb52b2 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -376,10 +376,10 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
// If this is a clrex instruction, provide a PA of 0 with no fault
// This will force the monitor to set the tracked address to 0
// a bit of a hack but this effectively clrears this processors monitor
- if (flags & Request::CLREX){
+ if (flags & Request::CLEAR_LL){
req->setPaddr(0);
req->setFlags(Request::UNCACHEABLE);
- req->setFlags(Request::CLREX);
+ req->setFlags(Request::CLEAR_LL);
return NoFault;
}
if ((req->isInstFetch() && (!sctlr.i)) ||