summaryrefslogtreecommitdiff
path: root/src/arch/arm/tlb.cc
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2012-01-29 02:04:34 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-29 02:04:34 -0800
commitdc0e629ea1f074691d307cde3ab7dd51a5e2102f (patch)
tree9ce01152dc0c5231748a2da03199096a87ec34f5 /src/arch/arm/tlb.cc
parent22a076a6d5b949db5595bbca530fe7db927f6367 (diff)
downloadgem5-dc0e629ea1f074691d307cde3ab7dd51a5e2102f.tar.xz
Implement Ali's review feedback.
Try to decrease indentation, and remove some redundant FullSystem checks.
Diffstat (limited to 'src/arch/arm/tlb.cc')
-rw-r--r--src/arch/arm/tlb.cc20
1 files changed, 8 insertions, 12 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 6953090d0..b19ad5265 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -418,14 +418,12 @@ TLB::translateSe(RequestPtr req, ThreadContext *tc, Mode mode,
}
}
- if (!FullSystem) {
- Addr paddr;
- Process *p = tc->getProcessPtr();
+ Addr paddr;
+ Process *p = tc->getProcessPtr();
- if (!p->pTable->translate(vaddr, paddr))
- return Fault(new GenericPageTableFault(vaddr));
- req->setPaddr(paddr);
- }
+ if (!p->pTable->translate(vaddr, paddr))
+ return Fault(new GenericPageTableFault(vaddr));
+ req->setPaddr(paddr);
return NoFault;
}
@@ -570,11 +568,9 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
}
}
- if (FullSystem) {
- if (!bootUncacheability &&
- ((ArmSystem*)tc->getSystemPtr())->adderBootUncacheable(vaddr))
- req->setFlags(Request::UNCACHEABLE);
- }
+ if (!bootUncacheability &&
+ ((ArmSystem*)tc->getSystemPtr())->adderBootUncacheable(vaddr))
+ req->setFlags(Request::UNCACHEABLE);
switch ( (dacr >> (te->domain * 2)) & 0x3) {
case 0: