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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:18 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:18 -0500 |
| commit | 2bad5138e4c1802645272a33f9b04859adac8ce2 (patch) | |
| tree | 21fa6dd74f6b3f636706c97345e8018b10b89bd6 /src/arch/arm/tlb.cc | |
| parent | 6b00c7fa22a38f140790aa57c8913178b006e5e8 (diff) | |
| download | gem5-2bad5138e4c1802645272a33f9b04859adac8ce2.tar.xz | |
ARM TLB: Fix bug in memAttrs getting a bogus thread context
Diffstat (limited to 'src/arch/arm/tlb.cc')
| -rw-r--r-- | src/arch/arm/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 422ac68f4..acc6b416b 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -387,7 +387,7 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, // Set memory attributes TlbEntry temp_te; - tableWalker->memAttrs(temp_te, 0, 1); + tableWalker->memAttrs(tc, temp_te, 0, 1); temp_te.shareable = true; DPRINTF(TLBVerbose, "(No MMU) setting memory attributes: shareable:\ %d, innerAttrs: %d, outerAttrs: %d\n", temp_te.shareable, |