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| author | Dylan Johnson <Dylan.Johnson@ARM.com> | 2016-08-02 10:38:03 +0100 |
|---|---|---|
| committer | Dylan Johnson <Dylan.Johnson@ARM.com> | 2016-08-02 10:38:03 +0100 |
| commit | 4d5d47c173d3e649c7e620481d18ea93a3e09e79 (patch) | |
| tree | 2a3663fcc250d5c24b1992a6d7b84c2fdf94a1ed /src/arch/arm/tlb.cc | |
| parent | 89511856fe15077d4f568e3226aff66d1f3b39eb (diff) | |
| download | gem5-4d5d47c173d3e649c7e620481d18ea93a3e09e79.tar.xz | |
arm: Add TLBI instruction for stage 2 IPA's
This patch adds support for stage 2 TLBI instructions
such as TLBI IPAS2E1_Xt.
Change-Id: I0cd5e8055b0c1003e03439aa5183252f50ea0a88
Diffstat (limited to 'src/arch/arm/tlb.cc')
| -rw-r--r-- | src/arch/arm/tlb.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 9a44b1b58..a19a609b7 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -337,6 +337,13 @@ TLB::_flushMva(Addr mva, uint64_t asn, bool secure_lookup, bool hyp, } } +void +TLB::flushIpaVmid(Addr ipa, bool secure_lookup, bool hyp, uint8_t target_el) +{ + assert(!isStage2); + stage2Tlb->_flushMva(ipa, 0xbeef, secure_lookup, hyp, true, target_el); +} + bool TLB::checkELMatch(uint8_t target_el, uint8_t tentry_el, bool ignore_el) { |