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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-08-01 22:50:13 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-08-01 22:50:13 -0700 |
| commit | 1c2800465480993040e3058ef94ce30efbe982ec (patch) | |
| tree | 2b4236747ceab2b009c46aa78ab8fe059d18c89e /src/arch/arm/tlb.cc | |
| parent | c0755e60852893fdaf86ee6c5581f7af6557ae7c (diff) | |
| download | gem5-1c2800465480993040e3058ef94ce30efbe982ec.tar.xz | |
Clean up some inconsistencies with Request flags.
Diffstat (limited to 'src/arch/arm/tlb.cc')
| -rw-r--r-- | src/arch/arm/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 8cce5c152..febc6d081 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -147,7 +147,7 @@ TLB::checkCacheability(RequestPtr &req) // or by the TLB entry if((req->getVaddr() & VAddrUncacheable) == VAddrUncacheable) { // mark request as uncacheable - req->setFlags(req->getFlags() | Request::UNCACHEABLE); + req->setFlags(Request::UNCACHEABLE); } return NoFault; } |