ARM: Track the current ISA mode using the PC.

1 files changed, 18 insertions, 4 deletions

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 864c061a2..5ed77aea1 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2001-2005 The Regents of The University of Michigan
  * Copyright (c) 2007 MIPS Technologies, Inc.
  * Copyright (c) 2007-2008 The Florida State University
@@ -278,18 +290,20 @@ TLB::regStats()
 Fault
 TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
 {
+    Addr vaddr = req->getVaddr() & ~PcModeMask;
 #if !FULL_SYSTEM
     Process * p = tc->getProcessPtr();
 
-    Fault fault = p->pTable->translate(req);
-    if(fault != NoFault)
-        return fault;
+    Addr paddr;
+    if (!p->pTable->translate(vaddr, paddr))
+        return Fault(new GenericPageTableFault(vaddr));
+    req->setPaddr(paddr);
 
     return NoFault;
 #else
     SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
     if (!sctlr.m) {
-        req->setPaddr(req->getVaddr());
+        req->setPaddr(vaddr);
         return NoFault;
     }
     panic("MMU translation not implemented\n");