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author | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
commit | 6368edb281f162e4fbb0a91744992a25134135f4 (patch) | |
tree | e84dfa7d10903e6c7a56e01cc6ca23f4b0d41908 /src/arch/arm/tlb.hh | |
parent | f4f6b31df1a8787a12d71108eac24543bdf541e3 (diff) | |
download | gem5-6368edb281f162e4fbb0a91744992a25134135f4.tar.xz |
ARM: Implement all ARM SIMD instructions.
Diffstat (limited to 'src/arch/arm/tlb.hh')
-rw-r--r-- | src/arch/arm/tlb.hh | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh index 1bddd8497..668984591 100644 --- a/src/arch/arm/tlb.hh +++ b/src/arch/arm/tlb.hh @@ -65,20 +65,22 @@ class TLB : public BaseTLB { public: enum ArmFlags { - AlignmentMask = 0x7, + AlignmentMask = 0x1f, AlignByte = 0x0, AlignHalfWord = 0x1, AlignWord = 0x3, AlignDoubleWord = 0x7, + AlignQuadWord = 0xf, + AlignOctWord = 0x1f, - AllowUnaligned = 0x8, + AllowUnaligned = 0x20, // Priv code operating as if it wasn't - UserMode = 0x10, + UserMode = 0x40, // Because zero otherwise looks like a valid setting and may be used // accidentally, this bit must be non-zero to show it was used on // purpose. - MustBeOne = 0x20 + MustBeOne = 0x80 }; protected: typedef std::multimap<Addr, int> PageTable; |