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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-03-14 17:26:06 +0000 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-04-06 10:10:10 +0000 |
commit | 4a66b5f7f8f9fbaec814d956ac53362a574a8620 (patch) | |
tree | 90c7ca9cbad3fd06ed52ab8db59e4c79ae190a8c /src/arch/arm/tracers/SConscript | |
parent | 2d1add2d5d6b49a0eac1ef9180786fe28d207098 (diff) | |
download | gem5-4a66b5f7f8f9fbaec814d956ac53362a574a8620.tar.xz |
arch-arm: Add support for Tarmac trace generation
This patch introduces the TarmacTracer: an instruction tracer which
allows to dump a gem5 execution trace in Tarmac format [1]. The new
tracer is supporting either Tarmac and TarmacV8 format specifications.
Not every traceable information has been implemented:
Implemented Trace Type:
Instruction Trace
Register Trace
Processor Memory Access Trace
Unimplemented Trace Type:
Program Flow Trace
Event Trace
Memory Bus Trace
[1]: https://developer.arm.com/docs/dui0845/f/tarmac-trace-file-format
Change-Id: I8799d8e5852e868673f728971db3fe8c63961f5e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/9382
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/tracers/SConscript')
-rw-r--r-- | src/arch/arm/tracers/SConscript | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/tracers/SConscript b/src/arch/arm/tracers/SConscript index 1491e1a62..ad11b0a67 100644 --- a/src/arch/arm/tracers/SConscript +++ b/src/arch/arm/tracers/SConscript @@ -42,3 +42,6 @@ if env['TARGET_ISA'] == 'arm': SimObject('TarmacTrace.py') Source('tarmac_base.cc') Source('tarmac_parser.cc') + Source('tarmac_tracer.cc') + Source('tarmac_record.cc') + Source('tarmac_record_v8.cc') |