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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-08 13:58:24 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-08 13:58:24 -0600 |
| commit | 432fa0aad6092d6a9252f6a9c83c8b36509c1341 (patch) | |
| tree | 88a01aec1327a2a6046979b7c4b302a7383e6653 /src/arch/arm/types.hh | |
| parent | 0f2bbe15ddfeb3894726c19e09ed23f7027df1cb (diff) | |
| download | gem5-432fa0aad6092d6a9252f6a9c83c8b36509c1341.tar.xz | |
ARM: Add support for M5 ops in the ARM ISA
Diffstat (limited to 'src/arch/arm/types.hh')
| -rw-r--r-- | src/arch/arm/types.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 57f34e3c2..a679686c7 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -141,7 +141,7 @@ namespace ArmISA Bitfield<2, 0> fpImm; Bitfield<24, 20> punwl; - Bitfield<7, 0> m5Func; + Bitfield<15, 8> m5Func; // 16 bit thumb bitfields Bitfield<15, 13> topcode15_13; |