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author | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
commit | 0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch) | |
tree | 1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/arch/arm/types.hh | |
parent | eae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff) | |
download | gem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz |
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs
more flexibility in how they cache things and manage the process.
--HG--
rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/arch/arm/types.hh')
-rw-r--r-- | src/arch/arm/types.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 31dec7bcb..ebebbcc46 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -48,7 +48,7 @@ #include "base/hashmap.hh" #include "base/misc.hh" #include "base/types.hh" -#include "debug/Predecoder.hh" +#include "debug/Decoder.hh" namespace ArmISA { @@ -342,7 +342,7 @@ namespace ArmISA ITSTATE it = _itstate; uint8_t cond_mask = it.mask; uint8_t thumb_cond = it.cond; - DPRINTF(Predecoder, "Advancing ITSTATE from %#x,%#x.\n", + DPRINTF(Decoder, "Advancing ITSTATE from %#x,%#x.\n", thumb_cond, cond_mask); cond_mask <<= 1; uint8_t new_bit = bits(cond_mask, 4); @@ -351,7 +351,7 @@ namespace ArmISA thumb_cond = 0; else replaceBits(thumb_cond, 0, new_bit); - DPRINTF(Predecoder, "Advancing ITSTATE to %#x,%#x.\n", + DPRINTF(Decoder, "Advancing ITSTATE to %#x,%#x.\n", thumb_cond, cond_mask); it.mask = cond_mask; it.cond = thumb_cond; |