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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-01 22:11:27 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-01 22:11:27 -0700 |
| commit | f409d7819d58226af2b6d7c0b95c801316180e76 (patch) | |
| tree | 9ec9a84619686309d9051c5f72b2307f4b0994cc /src/arch/arm/types.hh | |
| parent | 1f0c0a66881b9e45a5572fea9f780b90dc30a259 (diff) | |
| download | gem5-f409d7819d58226af2b6d7c0b95c801316180e76.tar.xz | |
ARM: Add in some new artificial fields that make decoding a little easier.
Diffstat (limited to 'src/arch/arm/types.hh')
| -rw-r--r-- | src/arch/arm/types.hh | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 98070a874..d87bad412 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -38,7 +38,11 @@ namespace ArmISA { typedef uint32_t MachInst; - BitUnion32(ExtMachInst) + BitUnion64(ExtMachInst) + // Made up bitfields that make life easier. + Bitfield<33> sevenAndFour; + Bitfield<32> isMisc; + // All the different types of opcode fields. Bitfield<27, 25> opcode; Bitfield<27, 25> opcode27_25; |