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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:00 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:00 -0500
commit659f8d021f245acc13773466d0818a7c4d850611 (patch)
treef2c56ac635d6fae1231c77753a538778bbbcfff4 /src/arch/arm/types.hh
parentbc6ae010c9113efdc8a3613d49c30fc5da1dd53e (diff)
downloadgem5-659f8d021f245acc13773466d0818a7c4d850611.tar.xz
ARM: Add bitfields for 32 bit thumb.
Diffstat (limited to 'src/arch/arm/types.hh')
-rw-r--r--src/arch/arm/types.hh25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index 72745a83c..c3dcfe28a 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -143,6 +143,31 @@ namespace ArmISA
Bitfield<7, 5> topcode7_5;
Bitfield<7, 4> topcode7_4;
Bitfield<3, 0> topcode3_0;
+
+ // 32 bit thumb bitfields
+ Bitfield<28, 27> htopcode12_11;
+ Bitfield<26, 25> htopcode10_9;
+ Bitfield<25> htopcode9;
+ Bitfield<25, 24> htopcode9_8;
+ Bitfield<25, 21> htopcode9_5;
+ Bitfield<25, 20> htopcode9_4;
+ Bitfield<24> htopcode8;
+ Bitfield<24, 23> htopcode8_7;
+ Bitfield<24, 22> htopcode8_6;
+ Bitfield<24, 21> htopcode8_5;
+ Bitfield<22, 21> htopcode6_5;
+ Bitfield<21, 20> htopcode5_4;
+ Bitfield<20> htopcode4;
+
+ Bitfield<19, 16> htrn;
+ Bitfield<20> hts;
+
+ Bitfield<15> ltopcode15;
+ Bitfield<7, 4> ltopcode7_4;
+ Bitfield<4> ltopcode4;
+
+ Bitfield<11, 8> ltrd;
+ Bitfield<11, 8> ltcoproc;
EndBitUnion(ExtMachInst)
// Shift types for ARM instructions