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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 22:50:33 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 22:50:33 -0700 |
| commit | 5c2a362cb79d9aaf5fc69cf05a56d67d98f8b737 (patch) | |
| tree | 085101581ed71b5b3d96ce3887efdbff084e1e35 /src/arch/arm/types.hh | |
| parent | d4a03f19009b9a537d99d54620784d441f9c3a92 (diff) | |
| download | gem5-5c2a362cb79d9aaf5fc69cf05a56d67d98f8b737.tar.xz | |
ARM: Move util functions out of the isa desc.
Diffstat (limited to 'src/arch/arm/types.hh')
| -rw-r--r-- | src/arch/arm/types.hh | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 5abf60d33..98070a874 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -172,6 +172,14 @@ namespace ArmISA Bitfield<7, 0> m5Func; EndBitUnion(ExtMachInst) + // Shift types for ARM instructions + enum ArmShiftType { + LSL = 0, + LSR, + ASR, + ROR + }; + typedef uint8_t RegIndex; typedef uint64_t IntReg; |