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author | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-08-02 10:38:01 +0100 |
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committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-08-02 10:38:01 +0100 |
commit | 49538a71186d98f5440c5db646e23507fc2e38d1 (patch) | |
tree | 96994897ff3faf3da05b44d2375afcc0b98140b9 /src/arch/arm/utility.cc | |
parent | 4fbf40daab480ae02b75a75e0dd5f56ce38386d2 (diff) | |
download | gem5-49538a71186d98f5440c5db646e23507fc2e38d1.tar.xz |
arm: enable EL2 support
Change-Id: I59fa4fae98c33d9e5c2185382e1411911d27d341
Diffstat (limited to 'src/arch/arm/utility.cc')
-rw-r--r-- | src/arch/arm/utility.cc | 44 |
1 files changed, 21 insertions, 23 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index df00e8bcc..ea7fa2bde 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009-2014 ARM Limited + * Copyright (c) 2009-2014, 2016 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -235,14 +235,14 @@ ELIs64(ThreadContext *tc, ExceptionLevel el) return opModeIs64(currOpMode(tc)); case EL1: { - // @todo: uncomment this to enable Virtualization - // if (ArmSystem::haveVirtualization(tc)) { - // HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2); - // return hcr.rw; - // } - assert(ArmSystem::haveSecurity(tc)); - SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); - return scr.rw; + if (ArmSystem::haveVirtualization(tc)) { + HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2); + return hcr.rw; + } else if (ArmSystem::haveSecurity(tc)) { + SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); + return scr.rw; + } + panic("must haveSecurity(tc)"); } case EL2: { @@ -286,13 +286,12 @@ purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, else if (!bits(addr, 55, 48) && tcr.tbi0) return bits(addr,55, 0); break; - // @todo: uncomment this to enable Virtualization - // case EL2: - // assert(ArmSystem::haveVirtualization()); - // tcr = tc->readMiscReg(MISCREG_TCR_EL2); - // if (tcr.tbi) - // return addr & mask(56); - // break; + case EL2: + assert(ArmSystem::haveVirtualization(tc)); + tcr = tc->readMiscReg(MISCREG_TCR_EL2); + if (tcr.tbi) + return addr & mask(56); + break; case EL3: assert(ArmSystem::haveSecurity(tc)); if (tcr.tbi) @@ -320,13 +319,12 @@ purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el) else if (!bits(addr, 55, 48) && tcr.tbi0) return bits(addr,55, 0); break; - // @todo: uncomment this to enable Virtualization - // case EL2: - // assert(ArmSystem::haveVirtualization()); - // tcr = tc->readMiscReg(MISCREG_TCR_EL2); - // if (tcr.tbi) - // return addr & mask(56); - // break; + case EL2: + assert(ArmSystem::haveVirtualization(tc)); + tcr = tc->readMiscReg(MISCREG_TCR_EL2); + if (tcr.tbi) + return addr & mask(56); + break; case EL3: assert(ArmSystem::haveSecurity(tc)); tcr = tc->readMiscReg(MISCREG_TCR_EL3); |