summaryrefslogtreecommitdiff
path: root/src/arch/arm/utility.cc
diff options
context:
space:
mode:
authorCurtis Dunham <Curtis.Dunham@arm.com>2014-04-29 16:05:02 -0500
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-04-29 16:05:02 -0500
commit4a3f11149d791284a012af71067f6b2199aa165c (patch)
treec960b2f2c5e23fc37e238f423a8bbc3b73419213 /src/arch/arm/utility.cc
parent035a82ee2c7e9ee72163a6559f721b242427906d (diff)
downloadgem5-4a3f11149d791284a012af71067f6b2199aa165c.tar.xz
arm: use condition code registers for ARM ISA
Analogous to ee049bf (for x86). Requires a bump of the checkpoint version and corresponding upgrader code to move the condition code register values to the new register file.
Diffstat (limited to 'src/arch/arm/utility.cc')
-rw-r--r--src/arch/arm/utility.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index b0eec495c..6d51d0591 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2009-2013 ARM Limited
+ * Copyright (c) 2009-2014 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -152,8 +152,8 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
for (int i = 0; i < NumFloatRegs; i++)
dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
- // Would need to add condition-code regs if implemented
- assert(NumCCRegs == 0);
+ for (int i = 0; i < NumCCRegs; i++)
+ dest->setCCReg(i, src->readCCReg(i));
for (int i = 0; i < NumMiscRegs; i++)
dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));