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authorGabe Black <gabeblack@google.com>2019-01-22 16:31:58 -0800
committerGabe Black <gabeblack@google.com>2019-01-23 01:55:53 +0000
commit298e8b833fe6183a435067361285b9e832a7e94a (patch)
treedcd6d9aec402501be10586cec87fa80c23166e7b /src/arch/arm/utility.cc
parent964e610ba0e141333510e0427937560d3376a8c0 (diff)
downloadgem5-298e8b833fe6183a435067361285b9e832a7e94a.tar.xz
arm: Replace MiscReg with RegVal in utility.(hh|cc).
These uses snuck in after the previous pass which made this switch in the rest of these files. Change-Id: Ie891c6ec393a65f1c57c54301f0a2bb920d38bb0 Reviewed-on: https://gem5-review.googlesource.com/c/15795 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/arm/utility.cc')
-rw-r--r--src/arch/arm/utility.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 58eb032c4..175fd7c00 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -205,7 +205,7 @@ longDescFormatInUse(ThreadContext *tc)
return ArmSystem::haveLPAE(tc) && ttbcr.eae;
}
-MiscReg
+RegVal
readMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
{
CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
@@ -235,7 +235,7 @@ readMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
}
}
-MiscReg
+RegVal
getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
{
// Multiprocessor Affinity Register MPIDR from Cortex(tm)-A15 Technical