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authorAkash Bagdia <akash.bagdia@arm.com>2014-05-09 18:58:46 -0400
committerAkash Bagdia <akash.bagdia@arm.com>2014-05-09 18:58:46 -0400
commit2b1a01ee6ccda9f046b1ceb13c90ee0635473959 (patch)
tree1877032b428dce5a8cbfd69f0f974b1015184a0d /src/arch/arm/utility.cc
parente940bac278a877699238f9c70748762ea9379db4 (diff)
downloadgem5-2b1a01ee6ccda9f046b1ceb13c90ee0635473959.tar.xz
cpu, arm: Allow the specification of a socket field
Allow the specification of a socket ID for every core that is reflected in the MPIDR field in ARM systems. This allows studying multi-socket / cluster systems with ARM CPUs.
Diffstat (limited to 'src/arch/arm/utility.cc')
-rw-r--r--src/arch/arm/utility.cc17
1 files changed, 15 insertions, 2 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index d5b062621..ae84391e9 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -195,13 +195,26 @@ longDescFormatInUse(ThreadContext *tc)
uint32_t
getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
{
+ // Multiprocessor Affinity Register MPIDR from Cortex(tm)-A15 Technical
+ // Reference Manual
+ //
+ // bit 31 - Multi-processor extensions available
+ // bit 30 - Uni-processor system
+ // bit 24 - Multi-threaded cores
+ // bit 11-8 - Cluster ID
+ // bit 1-0 - CPU ID
+ //
+ // We deliberately extend both the Cluster ID and CPU ID fields to allow
+ // for simulation of larger systems
+ assert((0 <= tc->cpuId()) && (tc->cpuId() < 256));
+ assert((0 <= tc->socketId()) && (tc->socketId() < 65536));
if (arm_sys->multiProc) {
return 0x80000000 | // multiprocessor extensions available
- tc->cpuId();
+ tc->cpuId() | tc->socketId() << 8;
} else {
return 0x80000000 | // multiprocessor extensions available
0x40000000 | // in up system
- tc->cpuId();
+ tc->cpuId() | tc->socketId() << 8;
}
}