cpu: add a condition-code register class

Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.

1 files changed, 7 insertions, 4 deletions

diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 776c1ae82..cddc2c5c4 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -113,7 +113,7 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
 void
 skipFunction(ThreadContext *tc)
 {
-    TheISA::PCState newPC = tc->pcState();
+    PCState newPC = tc->pcState();
     newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1));
 
     CheckerCPU *checker = tc->getCheckerCpuPtr();
@@ -127,13 +127,16 @@ skipFunction(ThreadContext *tc)
 void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
-    for (int i = 0; i < TheISA::NumIntRegs; i++)
+    for (int i = 0; i < NumIntRegs; i++)
         dest->setIntRegFlat(i, src->readIntRegFlat(i));
 
-    for (int i = 0; i < TheISA::NumFloatRegs; i++)
+    for (int i = 0; i < NumFloatRegs; i++)
         dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
 
-    for (int i = 0; i < TheISA::NumMiscRegs; i++)
+    // Would need to add condition-code regs if implemented
+    assert(NumCCRegs == 0);
+
+    for (int i = 0; i < NumMiscRegs; i++)
         dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));
 
     // setMiscReg "with effect" will set the misc register mapping correctly.