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authorGabe Black <gblack@eecs.umich.edu>2010-08-25 19:10:42 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-08-25 19:10:42 -0500
commit54a919f22587c75be5e7f0b88d5ec13baba600aa (patch)
tree65b9d338a6968f16296e761ab7ce9a4867514b7e /src/arch/arm/utility.hh
parent6368edb281f162e4fbb0a91744992a25134135f4 (diff)
downloadgem5-54a919f22587c75be5e7f0b88d5ec13baba600aa.tar.xz
ARM: Implement CPACR register and return Undefined Instruction when FP access is disabled.
Diffstat (limited to 'src/arch/arm/utility.hh')
-rw-r--r--src/arch/arm/utility.hh19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 65c94926e..4256aa047 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -146,6 +146,25 @@ namespace ArmISA {
return !inUserMode(tc);
}
+ static inline bool
+ vfpEnabled(CPACR cpacr, CPSR cpsr)
+ {
+ return cpacr.cp10 == 0x3 ||
+ (cpacr.cp10 == 0x2 && inPrivilegedMode(cpsr));
+ }
+
+ static inline bool
+ vfpEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
+ {
+ return fpexc.en && vfpEnabled(cpacr, cpsr);
+ }
+
+ static inline bool
+ neonEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
+ {
+ return !cpacr.asedis && vfpEnabled(cpacr, cpsr, fpexc);
+ }
+
uint64_t getArgument(ThreadContext *tc, int number, bool fp);
Fault setCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2);