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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-13 17:27:01 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-13 17:27:01 -0500 |
| commit | 401165c778108ab22aeeee55c4f4451ca93bcffb (patch) | |
| tree | f525ba64108f6ebe208a04d2dee7b77621cafd96 /src/arch/arm/utility.hh | |
| parent | e097c4fb188fafc9cd2253500ab2d056da886c9c (diff) | |
| download | gem5-401165c778108ab22aeeee55c4f4451ca93bcffb.tar.xz | |
ARM: Further break up condition code into NZ, C, V bits.
Break up the condition code bits into NZ, C, V registers. These are individually
written and this removes some incorrect dependencies between instructions.
Diffstat (limited to 'src/arch/arm/utility.hh')
| -rw-r--r-- | src/arch/arm/utility.hh | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh index 8ad3de66a..ffd41791c 100644 --- a/src/arch/arm/utility.hh +++ b/src/arch/arm/utility.hh @@ -65,24 +65,27 @@ buildRetPC(const PCState &curPC, const PCState &callPC) } inline bool -testPredicate(CPSR cpsr, ConditionCode code) +testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code) { + bool n = (nz & 0x2); + bool z = (nz & 0x1); + switch (code) { - case COND_EQ: return cpsr.z; - case COND_NE: return !cpsr.z; - case COND_CS: return cpsr.c; - case COND_CC: return !cpsr.c; - case COND_MI: return cpsr.n; - case COND_PL: return !cpsr.n; - case COND_VS: return cpsr.v; - case COND_VC: return !cpsr.v; - case COND_HI: return (cpsr.c && !cpsr.z); - case COND_LS: return !(cpsr.c && !cpsr.z); - case COND_GE: return !(cpsr.n ^ cpsr.v); - case COND_LT: return (cpsr.n ^ cpsr.v); - case COND_GT: return !(cpsr.n ^ cpsr.v || cpsr.z); - case COND_LE: return (cpsr.n ^ cpsr.v || cpsr.z); + case COND_EQ: return z; + case COND_NE: return !z; + case COND_CS: return c; + case COND_CC: return !c; + case COND_MI: return n; + case COND_PL: return !n; + case COND_VS: return v; + case COND_VC: return !v; + case COND_HI: return (c && !z); + case COND_LS: return !(c && !z); + case COND_GE: return !(n ^ v); + case COND_LT: return (n ^ v); + case COND_GT: return !(n ^ v || z); + case COND_LE: return (n ^ v || z); case COND_AL: return true; case COND_UC: return true; default: |