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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-09-25 16:11:37 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-10-01 15:47:55 +0000 |
| commit | 312f44831f45c363bb1a97fdc601cb5efc8d5652 (patch) | |
| tree | a2ff08f447ec4ee921eea87139eb1575d87676cf /src/arch/arm/vtophys.cc | |
| parent | 06f1259a4054643eb02b183560478021442be91e (diff) | |
| download | gem5-312f44831f45c363bb1a97fdc601cb5efc8d5652.tar.xz | |
arch-arm: Move MiscReg BitUnions into a separate header file
As the number of MiscRegs increases there is the need of a cleaner
header file; this patch is separating miscreg.[cc,hh] where the miscreg
decoding/utility functions are defined/declared from the MiscReg
register types (BitUnion).
Change-Id: I815f53b117b50e47f93aa13d78356ef09d2a2541
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/13065
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/vtophys.cc')
0 files changed, 0 insertions, 0 deletions