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| author | Rekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com> | 2017-02-10 17:30:22 +0000 |
|---|---|---|
| committer | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2018-11-28 14:12:35 +0000 |
| commit | 3bb49cb2b01e55e33cd2ca7a872be65c49fabfc6 (patch) | |
| tree | bb90dca9ef7fc42df1869eeaba8fce9d41c32926 /src/arch/arm | |
| parent | c918d1435c243f2c74969b35793a87e10796c1a6 (diff) | |
| download | gem5-3bb49cb2b01e55e33cd2ca7a872be65c49fabfc6.tar.xz | |
cpu,arch-arm: Initialise data members
The value that is not initialized has a bogus value that manifests when
using some debug-flags what makes the usage of tracediff a bit more
challenging.
In addition, while debugging with other techniques, it introduces the
problem of understanding if the value of a field is 'intended' or just
an effect of the lack of initialisation.
Change-Id: Ied88caa77479c6f1d5166d80d1a1a057503cb106
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13125
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/arm')
| -rw-r--r-- | src/arch/arm/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index ac18ef1f4..46056d07b 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -79,7 +79,7 @@ TLB::TLB(const ArmTLBParams *p) directToStage2(false), tableWalker(p->walker), stage2Tlb(NULL), stage2Mmu(NULL), test(nullptr), rangeMRU(1), aarch64(false), aarch64EL(EL0), isPriv(false), isSecure(false), - isHyp(false), asid(0), vmid(0), dacr(0), + isHyp(false), asid(0), vmid(0), hcr(0), dacr(0), miscRegValid(false), miscRegContext(0), curTranType(NormalTran) { const ArmSystem *sys = dynamic_cast<const ArmSystem *>(p->sys); |