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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
| commit | b6e7029dd59fa9508835a5af7696c93785a00d87 (patch) | |
| tree | 0b0c0404639d39c6186bec663665d5014bfe61d2 /src/arch/arm | |
| parent | 7eb3ea2798275b7f242ea82fdf8ee14f012210c7 (diff) | |
| download | gem5-b6e7029dd59fa9508835a5af7696c93785a00d87.tar.xz | |
ARM: Fix PC operand handling.
Diffstat (limited to 'src/arch/arm')
| -rw-r--r-- | src/arch/arm/insts/static_inst.hh | 12 | ||||
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 7 |
2 files changed, 13 insertions, 6 deletions
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh index e0d268979..59d7fe705 100644 --- a/src/arch/arm/insts/static_inst.hh +++ b/src/arch/arm/insts/static_inst.hh @@ -140,6 +140,18 @@ class ArmStaticInstBase : public StaticInst } template<class XC> + static Addr + readPC(XC *xc) + { + Addr pc = xc->readPC(); + Addr tBit = pc & (ULL(1) << PcTBitShift); + if (tBit) + return pc + 4; + else + return pc + 8; + } + + template<class XC> static void setNextPC(XC *xc, Addr val) { diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 244d217ce..911f0425e 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -53,7 +53,7 @@ def operand_types {{ let {{ maybePCRead = ''' - ((%(reg_idx)s == PCReg) ? ((xc->readPC() & ~PcModeMask) + 8) : + ((%(reg_idx)s == PCReg) ? (readPC(xc) & ~PcModeMask) : xc->%(func)s(this, %(op_idx)s)) ''' maybePCWrite = ''' @@ -61,9 +61,6 @@ let {{ xc->%(func)s(this, %(op_idx)s, %(final_val)s)) ''' - readPC = 'xc->readPC() & ~PcModeMask' - writePC = 'setPC(xc, %(final_val)s)' - readNPC = 'xc->readNextPC() & ~PcModeMask' writeNPC = 'setNextPC(xc, %(final_val)s)' }}; @@ -117,8 +114,6 @@ def operands {{ 'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 43), 'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 44), 'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 45), - 'PC': ('PC', 'ud', None, (None, None, 'IsControl'), 50, - readPC, writePC), 'NPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51, readNPC, writeNPC), }}; |