alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.

The ISA parser used to generate different copies of exec functions
for each exec context class a particular CPU wanted to use. That's
since been changed so that those functions take a pointer to the base
ExecContext, so the code which would generate those extra functions
can be removed, and some functions which used to be templated on an
ExecContext subclass can be untemplated, or minimally less templated.

Now that some functions aren't going to be instantiated multiple times
with different signatures, there are also opportunities to collapse
templates and make many instruction definitions simpler within the
parser. Since those changes will be less mechanical, they're left for
later changes and will probably be done in smaller increments.

Change-Id: I0015307bb02dfb9c60380b56d2a820f12169ebea
Reviewed-on: https://gem5-review.googlesource.com/5381
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

9 files changed, 68 insertions, 79 deletions

diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh
index 486d30fe4..5c6a315a1 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -48,6 +48,7 @@
 #include "arch/arm/utility.hh"
 #include "arch/arm/system.hh"
 #include "base/trace.hh"
+#include "cpu/exec_context.hh"
 #include "cpu/static_inst.hh"
 #include "sim/byteswap.hh"
 #include "sim/full_system.hh"
@@ -290,16 +291,14 @@ class ArmStaticInst : public StaticInst
         return ((spsr & ~bitMask) | (val & bitMask));
     }
 
-    template<class XC>
     static inline Addr
-    readPC(XC *xc)
+    readPC(ExecContext *xc)
     {
         return xc->pcState().instPC();
     }
 
-    template<class XC>
     static inline void
-    setNextPC(XC *xc, Addr val)
+    setNextPC(ExecContext *xc, Addr val)
     {
         PCState pc = xc->pcState();
         pc.instNPC(val);
@@ -340,9 +339,8 @@ class ArmStaticInst : public StaticInst
     }
 
     // Perform an interworking branch.
-    template<class XC>
     static inline void
-    setIWNextPC(XC *xc, Addr val)
+    setIWNextPC(ExecContext *xc, Addr val)
     {
         PCState pc = xc->pcState();
         pc.instIWNPC(val);
@@ -351,9 +349,8 @@ class ArmStaticInst : public StaticInst
 
     // Perform an interworking branch in ARM mode, a regular branch
     // otherwise.
-    template<class XC>
     static inline void
-    setAIWNextPC(XC *xc, Addr val)
+    setAIWNextPC(ExecContext *xc, Addr val)
     {
         PCState pc = xc->pcState();
         pc.instAIWNPC(val);
diff --git a/src/arch/arm/isa/formats/breakpoint.isa b/src/arch/arm/isa/formats/breakpoint.isa
index c55cdf6f6..69d6855e3 100644
--- a/src/arch/arm/isa/formats/breakpoint.isa
+++ b/src/arch/arm/isa/formats/breakpoint.isa
@@ -80,8 +80,7 @@ output decoder {{
 
 output exec {{
     Fault
-    Breakpoint::execute(CPU_EXEC_CONTEXT *xc,
-                     Trace::InstRecord *traceData) const
+    Breakpoint::execute(ExecContext *xc, Trace::InstRecord *traceData) const
     {
         return std::make_shared<PrefetchAbort>(xc->pcState().pc(),
                                                ArmFault::DebugEvent);
diff --git a/src/arch/arm/isa/templates/basic.isa b/src/arch/arm/isa/templates/basic.isa
index 5faf9593a..c4c570bbe 100644
--- a/src/arch/arm/isa/templates/basic.isa
+++ b/src/arch/arm/isa/templates/basic.isa
@@ -42,7 +42,7 @@
 
 // Declarations for execute() methods.
 def template BasicExecDeclare {{
-        Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+        Fault execute(ExecContext *, Trace::InstRecord *) const;
 }};
 
 // Basic instruction class declaration template.
@@ -82,7 +82,8 @@ def template BasicConstructor64 {{
 
 // Basic instruction class execute method template.
 def template BasicExecute {{
-        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+        Fault %(class_name)s::execute(
+            ExecContext *xc, Trace::InstRecord *traceData) const
         {
                 Fault fault = NoFault;
 
@@ -110,7 +111,7 @@ def template BasicDecodeWithMnemonic {{
 
 // Definitions of execute methods that panic.
 def template BasicExecPanic {{
-Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
+Fault execute(ExecContext *, Trace::InstRecord *) const
 {
         panic("Execute method called when it shouldn't!");
         // GCC < 4.3 fail to recognize the above panic as no return
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa
index b252c91e7..05acb52eb 100644
--- a/src/arch/arm/isa/templates/macromem.isa
+++ b/src/arch/arm/isa/templates/macromem.isa
@@ -213,19 +213,19 @@ def template MicroIntConstructor {{
 def template MicroNeonMemExecDeclare {{
     template
     Fault %(class_name)s<%(targs)s>::execute(
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
     template
     Fault %(class_name)s<%(targs)s>::initiateAcc(
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
     template
     Fault %(class_name)s<%(targs)s>::completeAcc(PacketPtr,
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
 }};
 
 def template MicroNeonExecDeclare {{
     template
     Fault %(class_name)s<%(targs)s>::execute(
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
 }};
 
 ////////////////////////////////////////////////////////////////////
@@ -257,7 +257,7 @@ def template MicroNeonMixDeclare {{
 
 def template MicroNeonMixExecute {{
     template <class Element>
-    Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s<Element>::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index a0942d151..44f6ea797 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -42,7 +42,7 @@
 
 
 def template PanicExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         panic("Execute function executed when it shouldn't be!\n");
@@ -51,7 +51,7 @@ def template PanicExecute {{
 }};
 
 def template PanicInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         panic("InitiateAcc function executed when it shouldn't be!\n");
@@ -60,8 +60,7 @@ def template PanicInitiateAcc {{
 }};
 
 def template PanicCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         panic("CompleteAcc function executed when it shouldn't be!\n");
@@ -71,7 +70,7 @@ def template PanicCompleteAcc {{
 
 
 def template SwapExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -107,7 +106,7 @@ def template SwapExecute {{
 }};
 
 def template SwapInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -135,8 +134,7 @@ def template SwapInitiateAcc {{
 }};
 
 def template SwapCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -162,7 +160,7 @@ def template SwapCompleteAcc {{
 }};
 
 def template LoadExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -193,7 +191,7 @@ def template LoadExecute {{
 def template NeonLoadExecute {{
     template <class Element>
     Fault %(class_name)s<Element>::execute(
-            CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+            ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -225,7 +223,7 @@ def template NeonLoadExecute {{
 }};
 
 def template StoreExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -260,7 +258,7 @@ def template StoreExecute {{
 def template NeonStoreExecute {{
     template <class Element>
     Fault %(class_name)s<Element>::execute(
-            CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+            ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -296,7 +294,7 @@ def template NeonStoreExecute {{
 }};
 
 def template StoreExExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -335,7 +333,7 @@ def template StoreExExecute {{
 }};
 
 def template StoreExInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -364,7 +362,7 @@ def template StoreExInitiateAcc {{
 }};
 
 def template StoreInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -395,7 +393,7 @@ def template StoreInitiateAcc {{
 def template NeonStoreInitiateAcc {{
     template <class Element>
     Fault %(class_name)s<Element>::initiateAcc(
-            CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+            ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -425,7 +423,7 @@ def template NeonStoreInitiateAcc {{
 }};
 
 def template LoadInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -452,7 +450,7 @@ def template LoadInitiateAcc {{
 def template NeonLoadInitiateAcc {{
     template <class Element>
     Fault %(class_name)s<Element>::initiateAcc(
-            CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+            ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -476,8 +474,7 @@ def template NeonLoadInitiateAcc {{
 }};
 
 def template LoadCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -506,7 +503,7 @@ def template LoadCompleteAcc {{
 def template NeonLoadCompleteAcc {{
     template <class Element>
     Fault %(class_name)s<Element>::completeAcc(
-            PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
+            PacketPtr pkt, ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -534,8 +531,7 @@ def template NeonLoadCompleteAcc {{
 }};
 
 def template StoreCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         return NoFault;
@@ -545,16 +541,14 @@ def template StoreCompleteAcc {{
 def template NeonStoreCompleteAcc {{
     template <class Element>
     Fault %(class_name)s<Element>::completeAcc(
-            PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
-            Trace::InstRecord *traceData) const
+            PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const
     {
         return NoFault;
     }
 }};
 
 def template StoreExCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -850,11 +844,11 @@ def template LoadImmDeclare {{
 }};
 
 def template InitiateAccDeclare {{
-    Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+    Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
 }};
 
 def template CompleteAccDeclare {{
-    Fault completeAcc(PacketPtr,  %(CPU_exec_context)s *, Trace::InstRecord *) const;
+    Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
 }};
 
 def template RfeConstructor {{
diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa
index e831f17a5..fc922b330 100644
--- a/src/arch/arm/isa/templates/mem64.isa
+++ b/src/arch/arm/isa/templates/mem64.isa
@@ -47,7 +47,7 @@ let {{
 }};
 
 def template Load64Execute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -71,7 +71,7 @@ def template Load64Execute {{
 }};
 
 def template Store64Execute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -99,7 +99,7 @@ def template Store64Execute {{
 }};
 
 def template Store64InitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -123,7 +123,7 @@ def template Store64InitiateAcc {{
 }};
 
 def template StoreEx64Execute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -156,7 +156,7 @@ def template StoreEx64Execute {{
 }};
 
 def template StoreEx64InitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -180,7 +180,7 @@ def template StoreEx64InitiateAcc {{
 }};
 
 def template Load64InitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -199,8 +199,7 @@ def template Load64InitiateAcc {{
 }};
 
 def template Load64CompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -224,8 +223,7 @@ def template Load64CompleteAcc {{
 }};
 
 def template Store64CompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         return NoFault;
@@ -233,8 +231,7 @@ def template Store64CompleteAcc {{
 }};
 
 def template StoreEx64CompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -283,7 +280,7 @@ def template DCStore64Constructor {{
 }};
 
 def template DCStore64Execute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
                                   Trace::InstRecord *traceData) const
     {
         Addr EA;
@@ -311,7 +308,7 @@ def template DCStore64Execute {{
 }};
 
 def template DCStore64InitiateAcc {{
-    Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::initiateAcc(ExecContext *xc,
                                       Trace::InstRecord *traceData) const
     {
         Addr EA;
diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa
index 9e9b79957..c1ec74135 100644
--- a/src/arch/arm/isa/templates/neon.isa
+++ b/src/arch/arm/isa/templates/neon.isa
@@ -177,7 +177,7 @@ class %(class_name)s : public %(base_class)s
 def template NeonExecDeclare {{
     template
     Fault %(class_name)s<%(targs)s>::execute(
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
 }};
 
 output header {{
@@ -208,7 +208,7 @@ output header {{
 
 def template NeonEqualRegExecute {{
     template <class Element>
-    Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s<Element>::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -253,7 +253,7 @@ output header {{
 
 def template NeonUnequalRegExecute {{
     template <class Element>
-    Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s<Element>::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         typedef typename bigger_type_t<Element>::type BigElement;
diff --git a/src/arch/arm/isa/templates/neon64.isa b/src/arch/arm/isa/templates/neon64.isa
index 336187fd8..f11ee91d4 100644
--- a/src/arch/arm/isa/templates/neon64.isa
+++ b/src/arch/arm/isa/templates/neon64.isa
@@ -167,12 +167,12 @@ class %(class_name)s : public %(base_class)s
 def template NeonXExecDeclare {{
     template
     Fault %(class_name)s<%(targs)s>::execute(
-            CPU_EXEC_CONTEXT *, Trace::InstRecord *) const;
+            ExecContext *, Trace::InstRecord *) const;
 }};
 
 def template NeonXEqualRegOpExecute {{
     template <class Element>
-    Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s<Element>::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
@@ -205,7 +205,7 @@ def template NeonXEqualRegOpExecute {{
 
 def template NeonXUnequalRegOpExecute {{
     template <class Element>
-    Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s<Element>::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         typedef typename bigger_type_t<Element>::type BigElement;
@@ -275,7 +275,7 @@ def template MicroNeonMemDeclare64 {{
 
 def template NeonLoadExecute64 {{
     Fault %(class_name)s::execute(
-        CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -303,7 +303,7 @@ def template NeonLoadExecute64 {{
 
 def template NeonLoadInitiateAcc64 {{
     Fault %(class_name)s::initiateAcc(
-        CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -323,8 +323,7 @@ def template NeonLoadInitiateAcc64 {{
 
 def template NeonLoadCompleteAcc64 {{
     Fault %(class_name)s::completeAcc(
-        PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
-        Trace::InstRecord *traceData) const
+        PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
 
@@ -349,7 +348,7 @@ def template NeonLoadCompleteAcc64 {{
 
 def template NeonStoreExecute64 {{
     Fault %(class_name)s::execute(
-        CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -381,7 +380,7 @@ def template NeonStoreExecute64 {{
 
 def template NeonStoreInitiateAcc64 {{
     Fault %(class_name)s::initiateAcc(
-        CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -407,8 +406,7 @@ def template NeonStoreInitiateAcc64 {{
 
 def template NeonStoreCompleteAcc64 {{
     Fault %(class_name)s::completeAcc(
-        PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
-        Trace::InstRecord *traceData) const
+        PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const
     {
         return NoFault;
     }
@@ -505,7 +503,7 @@ def template MicroNeonMixLaneDeclare64 {{
 }};
 
 def template MicroNeonMixExecute64 {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+    Fault %(class_name)s::execute(ExecContext *xc,
             Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa
index 7b372bdee..fb0a404cb 100644
--- a/src/arch/arm/isa/templates/pred.isa
+++ b/src/arch/arm/isa/templates/pred.isa
@@ -165,7 +165,8 @@ def template DataRegRegConstructor {{
 }};
 
 def template PredOpExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+    Fault %(class_name)s::execute(
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
         uint64_t resTemp = 0;
@@ -189,7 +190,8 @@ def template PredOpExecute {{
 }};
 
 def template QuiescePredOpExecute {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+    Fault %(class_name)s::execute(
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
         uint64_t resTemp = 0;
@@ -214,7 +216,8 @@ def template QuiescePredOpExecute {{
 }};
 
 def template QuiescePredOpExecuteWithFixup {{
-    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
+    Fault %(class_name)s::execute(
+        ExecContext *xc, Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
         uint64_t resTemp = 0;