diff options
author | Curtis Dunham <Curtis.Dunham@arm.com> | 2014-05-09 18:58:47 -0400 |
---|---|---|
committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2014-05-09 18:58:47 -0400 |
commit | fe27f937aa833a2d25e0462fd0cac301a45df8cb (patch) | |
tree | f3e6d4a35c883af82e66ae6837722c7579db146e /src/arch/arm | |
parent | 0c1913336af42b6d789fa7738690e64b7784d9df (diff) | |
download | gem5-fe27f937aa833a2d25e0462fd0cac301a45df8cb.tar.xz |
arch: teach ISA parser how to split code across files
This patch encompasses several interrelated and interdependent changes
to the ISA generation step. The end goal is to reduce the size of the
generated compilation units for instruction execution and decoding so
that batch compilation can proceed with all CPUs active without
exhausting physical memory.
The ISA parser (src/arch/isa_parser.py) has been improved so that it can
accept 'split [output_type];' directives at the top level of the grammar
and 'split(output_type)' python calls within 'exec {{ ... }}' blocks.
This has the effect of "splitting" the files into smaller compilation
units. I use air-quotes around "splitting" because the files themselves
are not split, but preprocessing directives are inserted to have the same
effect.
Architecturally, the ISA parser has had some changes in how it works.
In general, it emits code sooner. It doesn't generate per-CPU files,
and instead defers to the C preprocessor to create the duplicate copies
for each CPU type. Likewise there are more files emitted and the C
preprocessor does more substitution that used to be done by the ISA parser.
Finally, the build system (SCons) needs to be able to cope with a
dynamic list of source files coming out of the ISA parser. The changes
to the SCons{cript,truct} files support this. In broad strokes, the
targets requested on the command line are hidden from SCons until all
the build dependencies are determined, otherwise it would try, realize
it can't reach the goal, and terminate in failure. Since build steps
(i.e. running the ISA parser) must be taken to determine the file list,
several new build stages have been inserted at the very start of the
build. First, the build dependencies from the ISA parser will be emitted
to arch/$ISA/generated/inc.d, which is then read by a new SCons builder
to finalize the dependencies. (Once inc.d exists, the ISA parser will not
need to be run to complete this step.) Once the dependencies are known,
the 'Environments' are made by the makeEnv() function. This function used
to be called before the build began but now happens during the build.
It is easy to see that this step is quite slow; this is a known issue
and it's important to realize that it was already slow, but there was
no obvious cause to attribute it to since nothing was displayed to the
terminal. Since new steps that used to be performed serially are now in a
potentially-parallel build phase, the pathname handling in the SCons scripts
has been tightened up to deal with chdir() race conditions. In general,
pathnames are computed earlier and more likely to be stored, passed around,
and processed as absolute paths rather than relative paths. In the end,
some of these issues had to be fixed by inserting serializing dependencies
in the build.
Minor note:
For the null ISA, we just provide a dummy inc.d so SCons is never
compelled to try to generate it. While it seems slightly wrong to have
anything in src/arch/*/generated (i.e. a non-generated 'generated' file),
it's by far the simplest solution.
Diffstat (limited to 'src/arch/arm')
-rw-r--r-- | src/arch/arm/SConscript | 9 | ||||
-rw-r--r-- | src/arch/arm/isa/formats/breakpoint.isa | 2 | ||||
-rw-r--r-- | src/arch/arm/isa/formats/unimp.isa | 6 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/basic.isa | 2 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/macromem.isa | 10 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/mem.isa | 42 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/mem64.isa | 22 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/neon.isa | 6 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/neon64.isa | 20 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/pred.isa | 6 |
10 files changed, 60 insertions, 65 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index aa9ce417b..78c0b01e9 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -89,10 +89,5 @@ if env['TARGET_ISA'] == 'arm': DebugFlag('Faults', "Trace Exceptions, interrupts, svc/swi") DebugFlag('TLBVerbose') - # Add in files generated by the ISA description. - isa_desc_files = env.ISADesc('isa/main.isa') - # Only non-header files need to be compiled. - for f in isa_desc_files: - if not f.path.endswith('.hh'): - Source(f) - + # Add files generated by the ISA description. + env.ISADesc('isa/main.isa') diff --git a/src/arch/arm/isa/formats/breakpoint.isa b/src/arch/arm/isa/formats/breakpoint.isa index 1825d0878..9795d864d 100644 --- a/src/arch/arm/isa/formats/breakpoint.isa +++ b/src/arch/arm/isa/formats/breakpoint.isa @@ -80,7 +80,7 @@ output decoder {{ output exec {{ Fault - Breakpoint::execute(%(CPU_exec_context)s *xc, + Breakpoint::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return new PrefetchAbort(xc->pcState().pc(), ArmFault::DebugEvent); diff --git a/src/arch/arm/isa/formats/unimp.isa b/src/arch/arm/isa/formats/unimp.isa index 393a210cb..bdfb0b255 100644 --- a/src/arch/arm/isa/formats/unimp.isa +++ b/src/arch/arm/isa/formats/unimp.isa @@ -173,14 +173,14 @@ output decoder {{ output exec {{ Fault - FailUnimplemented::execute(%(CPU_exec_context)s *xc, + FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return new UndefinedInstruction(machInst, false, mnemonic); } Fault - WarnUnimplemented::execute(%(CPU_exec_context)s *xc, + WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { if (!warned) { @@ -193,7 +193,7 @@ output exec {{ } Fault - FlushPipeInst::execute(%(CPU_exec_context)s *xc, + FlushPipeInst::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return new FlushPipe(); diff --git a/src/arch/arm/isa/templates/basic.isa b/src/arch/arm/isa/templates/basic.isa index e202a4768..5faf9593a 100644 --- a/src/arch/arm/isa/templates/basic.isa +++ b/src/arch/arm/isa/templates/basic.isa @@ -82,7 +82,7 @@ def template BasicConstructor64 {{ // Basic instruction class execute method template. def template BasicExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa index 465090660..9a6de16cc 100644 --- a/src/arch/arm/isa/templates/macromem.isa +++ b/src/arch/arm/isa/templates/macromem.isa @@ -180,19 +180,19 @@ def template MicroIntConstructor {{ def template MicroNeonMemExecDeclare {{ template Fault %(class_name)s<%(targs)s>::execute( - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; template Fault %(class_name)s<%(targs)s>::initiateAcc( - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; template Fault %(class_name)s<%(targs)s>::completeAcc(PacketPtr, - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; }}; def template MicroNeonExecDeclare {{ template Fault %(class_name)s<%(targs)s>::execute( - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; }}; //////////////////////////////////////////////////////////////////// @@ -224,7 +224,7 @@ def template MicroNeonMixDeclare {{ def template MicroNeonMixExecute {{ template <class Element> - Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa index e052cbb9d..6199c0920 100644 --- a/src/arch/arm/isa/templates/mem.isa +++ b/src/arch/arm/isa/templates/mem.isa @@ -42,7 +42,7 @@ def template PanicExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { panic("Execute function executed when it shouldn't be!\n"); @@ -51,7 +51,7 @@ def template PanicExecute {{ }}; def template PanicInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { panic("InitiateAcc function executed when it shouldn't be!\n"); @@ -61,7 +61,7 @@ def template PanicInitiateAcc {{ def template PanicCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { panic("CompleteAcc function executed when it shouldn't be!\n"); @@ -71,7 +71,7 @@ def template PanicCompleteAcc {{ def template SwapExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -107,7 +107,7 @@ def template SwapExecute {{ }}; def template SwapInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -136,7 +136,7 @@ def template SwapInitiateAcc {{ def template SwapCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -162,7 +162,7 @@ def template SwapCompleteAcc {{ }}; def template LoadExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -193,7 +193,7 @@ def template LoadExecute {{ def template NeonLoadExecute {{ template <class Element> Fault %(class_name)s<Element>::execute( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -225,7 +225,7 @@ def template NeonLoadExecute {{ }}; def template StoreExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -260,7 +260,7 @@ def template StoreExecute {{ def template NeonStoreExecute {{ template <class Element> Fault %(class_name)s<Element>::execute( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -296,7 +296,7 @@ def template NeonStoreExecute {{ }}; def template StoreExExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -335,7 +335,7 @@ def template StoreExExecute {{ }}; def template StoreExInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -364,7 +364,7 @@ def template StoreExInitiateAcc {{ }}; def template StoreInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -395,7 +395,7 @@ def template StoreInitiateAcc {{ def template NeonStoreInitiateAcc {{ template <class Element> Fault %(class_name)s<Element>::initiateAcc( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -425,7 +425,7 @@ def template NeonStoreInitiateAcc {{ }}; def template LoadInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -451,7 +451,7 @@ def template LoadInitiateAcc {{ def template NeonLoadInitiateAcc {{ template <class Element> Fault %(class_name)s<Element>::initiateAcc( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -479,7 +479,7 @@ def template NeonLoadInitiateAcc {{ def template LoadCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -508,7 +508,7 @@ def template LoadCompleteAcc {{ def template NeonLoadCompleteAcc {{ template <class Element> Fault %(class_name)s<Element>::completeAcc( - PacketPtr pkt, %(CPU_exec_context)s *xc, + PacketPtr pkt, CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -537,7 +537,7 @@ def template NeonLoadCompleteAcc {{ def template StoreCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -547,7 +547,7 @@ def template StoreCompleteAcc {{ def template NeonStoreCompleteAcc {{ template <class Element> Fault %(class_name)s<Element>::completeAcc( - PacketPtr pkt, %(CPU_exec_context)s *xc, + PacketPtr pkt, CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -556,7 +556,7 @@ def template NeonStoreCompleteAcc {{ def template StoreExCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa index 4d4b27ba9..aa5b8f6b8 100644 --- a/src/arch/arm/isa/templates/mem64.isa +++ b/src/arch/arm/isa/templates/mem64.isa @@ -47,7 +47,7 @@ let {{ }}; def template Load64Execute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -71,7 +71,7 @@ def template Load64Execute {{ }}; def template Store64Execute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -99,7 +99,7 @@ def template Store64Execute {{ }}; def template Store64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -123,7 +123,7 @@ def template Store64InitiateAcc {{ }}; def template StoreEx64Execute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -156,7 +156,7 @@ def template StoreEx64Execute {{ }}; def template StoreEx64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -180,7 +180,7 @@ def template StoreEx64InitiateAcc {{ }}; def template Load64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -200,7 +200,7 @@ def template Load64InitiateAcc {{ def template Load64CompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -225,7 +225,7 @@ def template Load64CompleteAcc {{ def template Store64CompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -234,7 +234,7 @@ def template Store64CompleteAcc {{ def template StoreEx64CompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -283,7 +283,7 @@ def template DCStore64Constructor {{ }}; def template DCStore64Execute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -311,7 +311,7 @@ def template DCStore64Execute {{ }}; def template DCStore64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa index ffa6b53d4..c437f7e13 100644 --- a/src/arch/arm/isa/templates/neon.isa +++ b/src/arch/arm/isa/templates/neon.isa @@ -190,7 +190,7 @@ class %(class_name)s : public %(base_class)s def template NeonExecDeclare {{ template Fault %(class_name)s<%(targs)s>::execute( - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; }}; output header {{ @@ -221,7 +221,7 @@ output header {{ def template NeonEqualRegExecute {{ template <class Element> - Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -266,7 +266,7 @@ output header {{ def template NeonUnequalRegExecute {{ template <class Element> - Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { typedef typename bigger_type_t<Element>::type BigElement; diff --git a/src/arch/arm/isa/templates/neon64.isa b/src/arch/arm/isa/templates/neon64.isa index d20e4e653..19dd50910 100644 --- a/src/arch/arm/isa/templates/neon64.isa +++ b/src/arch/arm/isa/templates/neon64.isa @@ -167,12 +167,12 @@ class %(class_name)s : public %(base_class)s def template NeonXExecDeclare {{ template Fault %(class_name)s<%(targs)s>::execute( - %(CPU_exec_context)s *, Trace::InstRecord *) const; + CPU_EXEC_CONTEXT *, Trace::InstRecord *) const; }}; def template NeonXEqualRegOpExecute {{ template <class Element> - Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -205,7 +205,7 @@ def template NeonXEqualRegOpExecute {{ def template NeonXUnequalRegOpExecute {{ template <class Element> - Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s<Element>::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { typedef typename bigger_type_t<Element>::type BigElement; @@ -275,7 +275,7 @@ def template MicroNeonMemDeclare64 {{ def template NeonLoadExecute64 {{ Fault %(class_name)s::execute( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -303,7 +303,7 @@ def template NeonLoadExecute64 {{ def template NeonLoadInitiateAcc64 {{ Fault %(class_name)s::initiateAcc( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -326,7 +326,7 @@ def template NeonLoadInitiateAcc64 {{ def template NeonLoadCompleteAcc64 {{ Fault %(class_name)s::completeAcc( - PacketPtr pkt, %(CPU_exec_context)s *xc, + PacketPtr pkt, CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -351,7 +351,7 @@ def template NeonLoadCompleteAcc64 {{ def template NeonStoreExecute64 {{ Fault %(class_name)s::execute( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -383,7 +383,7 @@ def template NeonStoreExecute64 {{ def template NeonStoreInitiateAcc64 {{ Fault %(class_name)s::initiateAcc( - %(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -409,7 +409,7 @@ def template NeonStoreInitiateAcc64 {{ def template NeonStoreCompleteAcc64 {{ Fault %(class_name)s::completeAcc( - PacketPtr pkt, %(CPU_exec_context)s *xc, + PacketPtr pkt, CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -507,7 +507,7 @@ def template MicroNeonMixLaneDeclare64 {{ }}; def template MicroNeonMixExecute64 {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa index 9973e9a2a..752ab8d1e 100644 --- a/src/arch/arm/isa/templates/pred.isa +++ b/src/arch/arm/isa/templates/pred.isa @@ -165,7 +165,7 @@ def template DataRegRegConstructor {{ }}; def template PredOpExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -189,7 +189,7 @@ def template PredOpExecute {{ }}; def template QuiescePredOpExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -214,7 +214,7 @@ def template QuiescePredOpExecute {{ }}; def template QuiescePredOpExecuteWithFixup {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; |